Inventor
Junichi Arita
Inventor
Musashino, JP
Overview
Patents· 21 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1056%
Y10TTechnical subjects covered by former us classification15%
G01TMeasurement of nuclear or x-radiation6%
H01LSemiconductor devices6%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests6%
B29CShaping or joining of plastics3%
H04WWireless communication networks3%
H10DInorganic electric semiconductor devices3%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h103%
PatentTitleYear
11,081,438Method of manufacturing semiconductor device202110,098,179Electronic device20188,492,882'Semiconductor device and method of manufacturing same'20138,188,583'Semiconductor device and method of manufacturing same'20126,774,638'Charged particle measuring device and measuring method thereof'20046,661,093'Semiconductor device'20036,639,392'Charged particle measuring device and measuring method thereof'20036,621,160'Semiconductor device and mounting board'20036,563,212'Semiconductor device'20036,404,049'Semiconductor device, manufacturing method thereof and mounting board'20026,232,653'TSOP type semiconductor device'20015,869,888'Semiconductor device with lead structure on principal surface of chip'19995,714,405'Semiconductor device'19985,583,375'Semiconductor device with lead structure within the planar area of the device'19965,571,428'Semiconductor leadframe and its production method and plastic encapsulated semiconductor device'19965,466,888'Packaged semiconductor device having stress absorbing film'19955,437,915'Semiconductor leadframe and its production method and plastic encapsulated semiconductor device'19955,406,028'Packaged semiconductor device having stress absorbing film'19955,371,044'Method of uniformly encapsulating a semiconductor device in resin'19945,299,092'Plastic sealed type semiconductor apparatus'19945,252,854'Semiconductor device having stacked lead structure'1993Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1993–2004Patents assigned to HITACHI LTD (16)· patent assignee history
1993–1999Based in Musashino, JP· patent location history
1996–1999Patents assigned to HITACHI MICROCOMPUTER SYST (2)· patent assignee history
2001–2003Based in Musashimurayama, JP· patent location history
2003–2021Based in Tokyo, JP· patent location history
2012–2021Patents assigned to RENESAS ELECTRONICS CORP (4)· patent assignee history
2012–2013Patents assigned to ARITA JUNICHI (2)· patent assignee history
2012–2013Patents assigned to HANAWA KAZUKO (2)· patent assignee history
2018Based in Kanagawa, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| HITACHI LTD | 16 | 1993–2004 |
| RENESAS ELECTRONICS CORP | 4 | 2012–2021 |
| ARITA JUNICHIself | 2 | 2012–2013 |
| HANAWA KAZUKO | 2 | 2012–2013 |
| HITACHI MICROCOMPUTER SYST | 2 | 1996–1999 |
Locations
| Location | Patents | Span |
|---|---|---|
| Musashino, JP | 10 | 1993–1999 |
| Tokyo, JP | 5 | 2003–2021 |
| Musashimurayama, JP | 5 | 2001–2003 |
| Kanagawa, JP | 1 | 2018 |