Inventor

Patrice Roussel

Inventor

Portland, OR, US

Overview

1999–2018

Patent span

Physics

Primary field (CPC G)

Patents· 45 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing85%

H03MCoding11%

G06TImage data processing or generation, in general4%

PatentTitleYear

10,152,323Method and apparatus for shuffling data2018 9,477,472'Method and apparatus for shuffling data'2016 9,229,719'Method and apparatus for shuffling data'2016 9,229,718'Method and apparatus for shuffling data'2016 9,043,583'Load/move and duplicate instructions for a processor'2015 RE045458'Dual function system and method for shuffling packed data elements'2015 8,688,959'Method and apparatus for shuffling data'2014 8,650,382'Load/move and duplicate instructions for a processor'2014 8,539,202'Load/move duplicate instructions for a processor'2013 8,225,075'Method and apparatus for shuffling data'2012 8,214,626'Method and apparatus for shuffling data'2012 8,200,941'Load/move duplicate instructions for a processor'2012 8,032,735'Load/move duplicate instructions for a processor'2011 7,853,778'Load/move and duplicate instructions for a processor'2010 7,631,025'Method and apparatus for rearranging data between multiple registers'2009 7,523,152'Methods for supporting extended precision integer divide macroinstructions in a processor'2009 7,467,286'Executing partial-width packed data instructions'2008 7,395,302'Method and apparatus for performing horizontal addition and subtraction'2008 7,392,275'Method and apparatus for performing efficient transformations with horizontal addition and subtraction'2008 7,366,881'Method and apparatus for staggering execution of an instruction'2008 7,216,138'Method and apparatus for floating point operations and format conversion operations'2007 6,970,994'Executing partial-width packed data instructions'2005 6,961,845'System to perform horizontal additions'2005 6,925,553'Staggering execution of a single packed data instruction using the same circuit'2005 6,898,700'Efficient saving and restoring state in task switching'2005 6,721,866'Unaligned memory operands'2004 6,694,426'Method and apparatus for staggering execution of a single packed data instruction using the same circuit'2004 6,687,810'Method and apparatus for staggering execution of a single packed data instruction using the same circuit'2004 6,502,115'Conversion between packed floating point data and packed 32-bit integer data in different architectural registers'2002 6,480,868'Conversion from packed floating point data to packed 8-bit integer data in different architectural registers'2002 6,425,073'Method and apparatus for staggering execution of an instruction'2002 6,418,529'Apparatus and method for performing intra-add operation'2002 6,317,824'Method and apparatus for performing integer operations in response to a result of a floating point operation'2001 6,292,815'Data conversion between floating point packed format and integer scalar format'2001 6,266,769'Conversion between packed floating point data and packed 32-bit integer data in different architectural registers'2001 6,263,426'Conversion from packed floating point data to packed 8-bit integer data in different architectural registers'2001 6,247,116'Conversion from packed floating point data to packed 16-bit integer data in different architectural registers'2001 6,230,253'Executing partial-width packed data instructions'2001 6,230,257'Method and apparatus for staggering execution of a single packed data instruction using the same circuit'2001 6,212,618'Apparatus and method for performing multi-dimensional computations based on intra-add operation'2001 6,185,671'Checking data type of operands specified by an instruction using attributes in a tagged array architecture'2001 6,122,725'Executing partial-width packed data instructions'2000 6,041,404'Dual function system and method for shuffling packed data elements'2000 6,014,735'Instruction set extension using prefixes'2000 5,995,122'Method and apparatus for parallel conversion of color values from a single precision floating point format to an integer format'1999

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1999–2018Patents assigned to INTEL CORP (45)· patent assignee history

1999–2018Based in Portland, OR, US· patent location history

2012–2016Patents assigned to DEBES ERIC L (4)· patent assignee history

2012–2016Patents assigned to MACY JR WILLIAM W (4)· patent assignee history

2012–2016Patents assigned to NGUYEN HUY V (4)· patent assignee history

2012–2015Patents assigned to ROUSSEL PATRICE (4)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
INTEL CORP	45	1999–2018
DEBES ERIC L	4	2012–2016
MACY JR WILLIAM W	4	2012–2016
NGUYEN HUY V	4	2012–2016
ROUSSEL PATRICEself	4	2012–2015

Locations

Location	Patents	Span
Portland, OR, US	45	1999–2018