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Inventor

Tze-Liang Ying

Inventor
Hsinchu, TW

Overview

2→
Patents
2000–2009
Patent span
Electricity
Primary field (CPC H)

Patents· 2 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1040%
H10BElectronic memory devices20%
H10DInorganic electric semiconductor devices20%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1020%
PatentTitleYear
7,482,278'Key-hole free process for high aspect ratio gap filling with reentrant spacer'20096,077,738'Inter-level dielectric planarization approach for a DRAM crown capacitor process'2000

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2000–2009Patents assigned to TAIWAN SEMICONDUCTOR MFG (2)· patent assignee history
2000–2009Based in Hsinchu, TW· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TAIWAN SEMICONDUCTOR MFG22000–2009
Locations
LocationPatentsSpan
Hsinchu, TW22000–2009