Inventor
Anton J. deVilliers
Inventor
Clifton Park, NY, US
Overview
Patents· 132 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1025%
H01LSemiconductor devices21%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices15%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1012%
H10DInorganic electric semiconductor devices7%
H10BElectronic memory devices3%
B82YSpecific uses or applications of nanostructures2%
G06FElectric digital data processing2%
Y10TTechnical subjects covered by former us classification2%
B05CApparatus for applying fluent materials to surfaces, in general1%
PatentTitleYear
11,133,206Method for die-level unique authentication and serialization of semiconductor devices using electrical and optical marking202111,114,381Power distribution network for 3D logic and memory202111,107,682Method for patterning a substrate using a layer with multiple materials202111,101,152Phase mixture temperature controlled hot plate202111,069,616Horizontal programmable conducting bridges between conductive lines202111,049,721Method and process for forming memory hole patterns202111,049,700Atmospheric plasma processing systems and methods for manufacture of microelectronic workpieces202110,998,244System and method for temperature control in plasma processing system202110,991,626Method for controlling transistor delay of nanowire or nanosheet transistor devices202110,964,706Three-dimensional semiconductor device including integrated circuit, transistors and transistor components and method of fabrication202110,946,411System and method for fluid dispense and coverage control202110,930,764Extension region for a semiconductor device202110,923,363Method for increasing pattern density on a wafer202110,916,637Method of forming gate spacer for nanowire FET device202110,833,078Semiconductor apparatus having stacked gates and method of manufacture thereof202010,811,265Location-specific tuning of stress to control bow to control overlay in semiconductor processing202010,770,479Three-dimensional device and method of forming the same202010,734,229Method of advanced contact hole pattering202010,734,224Method and device for incorporating single diffusion break into nanochannel structures of FET devices202010,714,391Method for controlling transistor delay of nanowire or nanosheet transistor devices202010,712,663High-purity dispense unit202010,665,672Method of preventing bulk silicon charge transfer for nanowire and nanoslab processing202010,622,233Amelioration of global wafer distortion based on determination of localized distortions of a semiconductor wafer202010,606,176Method for patterning a substrate using extreme ultraviolet lithography202010,586,765Buried power rails202010,573,655Three-dimensional semiconductor device and method of fabrication202010,551,743Critical dimension control by use of photo-sensitized chemicals or photo-sensitized chemically amplified resist202010,525,416Method of liquid filter wetting202010,529,830Extension region for a semiconductor device202010,522,461Semiconductor device structures201910,522,428Critical dimension control by use of a photo agent201910,490,630Method of preventing bulk silicon charge transfer for nanowire and nanoslab processing201910,475,657Location-specific tuning of stress to control bow to control overlay in semiconductor processing201910,460,938Method for patterning a substrate using a layer with multiple materials201910,453,692Location-specific tuning of stress to control bow to control overlay in semiconductor processing201910,453,850Three-dimensional semiconductor device including integrated circuit, transistors and transistor components and method of fabrication201910,431,468Location-specific tuning of stress to control bow to control overlay in semiconductor processing201910,403,501High-purity dispense system201910,388,519Method and device for incorporating single diffusion break into nanochannel structures of FET devices201910,366,890Method for patterning a substrate using a layer with multiple materials201910,354,872High-precision dispense system with meniscus control201910,338,466System and method for planarizing a substrate201910,332,744Method for patterning a substrate using a layer with multiple materials201910,157,747Location-specific tuning of stress to control bow to control overlay in semiconductor processing201810,151,981Methods of forming structures supported by semiconductor substrates201810,147,655System and method for temperature control in plasma processing system201810,115,726Method and system for forming memory fin patterns201810,103,032Methods of forming etch masks for sub-resolution substrate patterning201810,096,528Critical dimension control by use of a photo agent201810,083,842Methods of sub-resolution substrate patterning201810,061,199Methods of forming a mask for substrate patterning201810,035,113Method and system for a spiral mixer201810,032,719Semiconductor device structures201810,020,196Methods of forming etch masks for sub-resolution substrate patterning20189,997,598Three-dimensional semiconductor device and method of fabrication20189,989,846Method for patterning incorporating misalignment error protection20189,987,655Inline dispense capacitor system20189,977,339System and method for shifting critical dimensions of patterned films20189,921,478'Negative tone developer compatible photoresist composition and methods of use'20189,842,965'Textured devices'20179,837,314Self-alignment of metal and via using selective deposition20179,824,894'Method for correcting wafer bow from overlay'20179,818,611'Methods of forming etch masks for sub-resolution substrate patterning'20179,760,008'Direct current superposition freeze'20179,741,580'Substrate mask patterns, methods of forming a structure on a substrate, methods of forming a square lattice pattern from an oblique lattice pattern, and methods of forming a pattern on a substrate'20179,735,067'Substrate tuning system and method using optical projection'20179,721,793'Method of patterning without dummy gates'20179,718,082'Inline dispense capacitor'20179,711,419'Substrate backside texturing'20179,673,050'Method of patterning incorporating overlay error protection'20179,666,531'Semiconductor device structures'20179,653,319'Method for using post-processing methods for accelerating EUV lithography'20179,653,315'Methods of fabricating substrates'20179,645,495'Critical dimension control in photo-sensitized chemically-amplified resist'20179,646,898'Methods for treating a substrate by optical projection of a correction pattern based on a detected spatial heat signature of the substrate'20179,645,391'Substrate tuning system and method using optical projection'20179,646,845'Method of forming a mask for substrate patterning'20179,620,383'Method for uncovering underlying alignment patterns'20179,595,441'Patterning a substrate using grafting polymer material'20179,583,381'Methods for forming semiconductor devices and semiconductor device structures'20179,466,527'Method for creating contacts in semiconductor substrates'20169,437,447'Method for patterning a substrate for planarization'20169,406,526'Method for patterning contact openings on a substrate'20169,396,958'Self-aligned patterning using directed self-assembly of block copolymers'20169,396,996'Methods of forming openings in semiconductor structures'20169,385,276'Epitaxial devices'20169,378,974'Method for chemical polishing and planarization'20169,340,411'Defect-less directed self-assembly'20169,291,907'Methods for forming resist features and arrays of aligned, elongate resist features'20169,281,251'Substrate backside texturing'20169,263,297'Method for self-aligned double patterning without atomic layer deposition'20169,240,329'Method for multiplying pattern density by crossing multiple patterned layers'20169,235,134'Lens heating compensation in photolithography'20169,209,039'Methods of forming a reversed pattern in a substrate, and related semiconductor device structures'20159,176,385'Lithography methods, methods for forming patterning tools and patterning tools'20159,153,458'Methods of forming a pattern on a substrate'20159,140,977'Imaging devices, methods of forming same, and methods of forming semiconductor device structures'20159,142,504'Semiconductor device structures'20159,112,104'Epitaxial devices'20158,883,372'Reticle with composite polarizer and method of simultaneous optimization of imaging of a set of different patterns'20148,871,407'Patterning mask and method of formation of mask using step double patterning'20148,871,646'Methods of forming a masking pattern for integrated circuits'20148,845,908'Reticles, and methods of mitigating asymmetric lens heating in photolithography'20148,846,517'Methods of forming a pattern on a substrate'20148,815,752'Methods of forming features in semiconductor device structures'20148,815,747'Methods of forming patterns on substrates'20148,796,155'Methods of fabricating substrates'20148,758,987'Methods of forming a reversed pattern in a substrate'20148,748,321'Method for epitaxial devices'20148,736,814'Lithography wave-front control system and method'20148,728,721'Methods of processing substrates'20148,703,570'Methods of fabricating substrates'20148,691,477'Reticle design for the reduction of lens heating phenomenon'20148,685,630'Methods of forming a pattern in a material and methods of forming openings in a material to be patterned'20148,629,048'Methods of forming a pattern on a substrate'20148,625,078'Illumination design for lens heating mitigation'20148,609,302'Lithography methods, methods for forming patterning tools and patterning tools'20138,603,884'Methods of fabricating substrates'20138,575,032'Methods of forming a pattern on a substrate'20138,512,938'Methods of forming a pattern in a material and methods of forming openings in a material to be patterned'20138,507,191'Methods of forming a patterned, silicon-enriched developable antireflective material and semiconductor device structures including the same'20138,507,380'Methods of forming contact openings and methods of increasing contact area in only one of X and Y axes in the fabrication of integrated circuitry'20138,492,282'Methods of forming a masking pattern for integrated circuits'20138,476,002'Methods of forming patterned masks'20138,450,776'Epitaxial devices'20138,440,371'Imaging devices, methods of forming same, and methods of forming semiconductor device structures'20138,409,457'Methods of forming a photoresist-comprising pattern on a substrate'20138,288,083'Methods of forming patterned masks'20128,273,634'Methods of fabricating substrates'20128,247,302'Methods of fabricating substrates'20128,216,943'Epitaxial growth method'20128,153,522'Patterning mask and method of formation of mask using step double patterning'2012Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2012–2019Patents assigned to MICRON TECHNOLOGY INC (48)· patent assignee history
2012–2018Patents assigned to DEVILLIERS ANTON (23)· patent assignee history
2012–2016Patents assigned to ZHANG ZISHU (11)· patent assignee history
2012–2018Based in Boise, ID, US· patent location history
2013–2016Patents assigned to JAIN KAVERI (10)· patent assignee history
2014–2021Based in Clifton Park, NY, US· patent location history
2016–2021Patents assigned to TOKYO ELECTRON LTD (81)· patent assignee history
2020–2021Based in Albany, NY, US· patent location history
2021Based in New Albany, OH, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TOKYO ELECTRON LTD | 81 | 2016–2021 |
| MICRON TECHNOLOGY INC | 48 | 2012–2019 |
| DEVILLIERS ANTONself | 23 | 2012–2018 |
| ZHANG ZISHU | 11 | 2012–2016 |
| JAIN KAVERI | 10 | 2013–2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Clifton Park, New York, US | 91 | 2014–2021 |
| Boise, ID, US | 38 | 2012–2018 |
| Albany, New York, US | 2 | 2020–2021 |
| New Albany, OH, US | 1 | 2021 |