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Inventor

Eiichiro Kakehashi

Inventor
Tokyo, JP

Overview

3→
Patents
1999–2011
Patent span
Electricity
Primary field (CPC H)

Patents· 3 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G03Fprimary
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices14%
G11CStatic stores14%
H10BElectronic memory devices14%
H10DInorganic electric semiconductor devices14%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1014%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1014%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests14%
PatentTitleYear
7,995,373'Semiconductor memory device and information processing system'20117,298,002'Hemispherical silicon grain capacitor with variable grain size'20075,935,764'Method of forming alignment mark and fabricating semiconductor device'1999

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1999Patents assigned to NEC CORP (1)· patent assignee history
1999–2011Based in Tokyo, JP· patent location history
2007–2011Patents assigned to ELPIDA MEMORY INC (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
ELPIDA MEMORY INC22007–2011
NEC CORP11999
Locations
LocationPatentsSpan
Tokyo, JP31999–2011