Inventor

JOHN KALAMATIANOS

Inventor

Overview

54→

Patents

2022–2026

Patent span

Physics

Primary field (CPC G)

Patents· 54 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing69%

Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use16%

H03MCoding8%

G06NComputing arrangements based on specific computational models3%

G06KGraphical data reading1%

G11CStatic stores1%

H04BTransmission1%

H04LTransmission of digital information, e.g. telegraphic communication1%

PatentTitleYear

12,572,472Promoting prefetched data from a cache memory to registers in a processor2026 12,511,236Storing indications of cleared cache lines2025 12,498,931Preserving memory ordering between offloaded instructions and non-offloaded instructions2025 12,493,559Modifying system directory capacity based on power state transition2025 12,461,872Semiconductor device for performing data reduction for processing arrays2025 12,430,136Systems and methods for branch misprediction aware cache prefetcher training2025 12,373,207Implementing a micro-operation cache with compaction2025 12,360,907Region pattern-matching hardware prefetcher2025 12,339,783Managing a cache using per memory region reuse distance estimation2025 12,306,754Method and apparatus for increasing memory level parallelism by reducing miss status holding register allocation in caches2025 12,287,739Accessing a cache based on an address translation buffer result2025 12,189,953Speculative dram request enabling and disabling2025 12,175,073Reusing remote registers in processing in memory2024 12,153,926Processor-guided execution of offloaded instructions using fixed function operations2024 12,153,524Apparatus, system, and method for throttling prefetchers to prevent training on irregular memory accesses2024 12,135,653Flexible dictionary sharing for compressed caches2024 12,111,767Method and apparatus for a page-local delta-based prefetcher2024 12,105,957Accelerating relaxed remote atomics on multiple writer operations2024 12,073,251Offloading computations from a processor to remote execution logic2024 12,066,950Approach for managing near-memory processing commands and non-near-memory processing commands in a memory controller2024 12,045,169Hardware configuration selection using machine learning model2024 12,026,401DRAM row management for processing in memory2024 12,019,547Dispatch bandwidth of memory-centric requests by bypassing storage array address checking2024 11,960,404Method and apparatus for reducing the latency of long latency memory requests2024 11,921,634Leveraging processing-in-memory (PIM) resources to expedite non-PIM instructions executed on a host2024 11,874,739Error detection and correction in memory modules using programmable ECC engines2024 11,868,777Processor-guided execution of offloaded instructions using fixed function operations2024 11,847,062Re-fetching data for L3 cache data evictions into a last-level cache2023 11,847,061Approach for supporting memory-centric operations on cached data2023 11,842,199Controlling the operating speed of stages of an asynchronous pipeline2023 11,736,119Semi-sorting compression with encoding and decoding tables2023 11,726,868System and method for protecting GPU memory instructions against faults2023 11,726,783Filtering micro-operations for a micro-operation cache in a processor2023 11,726,917Method and apparatus for a page-local delta-based prefetcher2023 11,714,652Zero operand instruction conversion for accelerating sparse computations in a central processing unit pipeline2023 11,658,681Energy efficient adaptive data encoding method and circuit2023 11,656,945Method and apparatus to support instruction replay for executing idempotent code in dependent processing in memory devices2023 11,645,073Address-based filtering for load/store speculation2023 11,625,249Preserving memory ordering between offloaded instructions and non-offloaded instructions2023 11,586,555Flexible dictionary sharing for compressed caches2023 11,586,441Method and apparatus for virtualizing the micro-op cache2023 11,556,162Per-instruction energy debugging using instruction sampling hardware2023 11,550,588Branch target filtering based on memory region access count2023 11,513,801Controlling accesses to a branch prediction unit for sequences of fetch groups2022 11,513,802Compressing micro-operations in scheduler entries in a processor2022 11,509,333Masked fault detection for reliable low voltage cache operation2022 11,487,671GPU cache management based on locality type detection2022 11,481,331Promoting prefetched data from a cache memory to registers in a processor2022 11,455,252Multi-class multi-label classification using clustered singular decision trees for hardware adaptation2022 11,442,727Controlling prediction functional blocks used by a branch predictor in a processor2022 11,409,608Providing host-based error detection capabilities in a remote execution device2022 11,397,691Latency hiding for caches2022 11,309,911Semi-sorting compression with encoding and decoding tables2022 11,243,884Control flow guided lock address prefetch and filtering2022

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2022–2026Patents assigned to ADVANCED MICRO DEVICES INC (54)· patent assignee history

2022–2026Based in US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
ADVANCED MICRO DEVICES INC	54	2022–2026

Locations

Location	Patents	Span
US	54	2022–2026