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Inventor

Masamori Kashiyama

Inventor
Isehara, JP

Overview

14→
Patents
1990–2016
Patent span
Physics
Primary field (CPC G)

Patents· 14 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing29%
G11CStatic stores13%
B60LPropulsion of electrically-propelled vehicles8%
G01CMeasuring distances, levels or bearings8%
H03KPulse technique8%
Y02TClimate change mitigation technologies related to transportation8%
B60WConjoint control of vehicle sub-units of different type or different function4%
G05DSystems for controlling or regulating non-electric variables4%
G08GTraffic control systems4%
G09BEducational or demonstration appliances4%
PatentTitleYear
9,308,827'Reachable range calculation apparatus, method, and program'20168,768,624'Vehicle operation support system and vehicle operation support method'20148,116,811'Wireless communication control apparatus and method for mobile objects'20126,591,325'Method and apparatus of out-of-order transaction processing using request side queue pointer and response side queue pointer'20036,516,391'Multiprocessor system and methods for transmitting memory access transactions for the same'20036,438,653'Cache memory control circuit including summarized cache tag memory summarizing cache tag information in parallel processor system'20026,389,518'Multiprocessor system and methods for transmitting memory access transactions for the same'20025,628,000'Clock distributing logic and clock skew control design method for designing clock distributing logic'19975,367,490'Semiconductor integrated circuit device with two variable delay lines in writing circuit control'19945,247,695'Vector processor with byte access of memory'19935,115,393'Vector processor performing data operations in one half of a total time period of write operation and the read operation'19925,014,242'Semiconductor device for a ram disposed on chip so as to minimize distances of signal paths between the logic circuits and memory circuit'19915,001,626'Vector processor'19914,945,516'Write control circuit for a high-speed memory device'1990

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1990–2016Patents assigned to HITACHI LTD (13)· patent assignee history
1990–1994Based in Hadano, JP· patent location history
1991–1994Patents assigned to HITACHI MICROCUMPUTER ENG (2)· patent assignee history
1997–2012Based in Isehara, JP· patent location history
2012–2014Patents assigned to KASHIYAMA MASAMORI (2)· patent assignee history
2012–2014Patents assigned to KOBAYASHI YUICHI (2)· patent assignee history
2014Patents assigned to FUKUDA YUZURU (1)· patent assignee history
2014Based in Yokohama, JP· patent location history
2016Based in Tokyo, JP· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
HITACHI LTD131990–2016
HITACHI MICROCUMPUTER ENG21991–1994
KASHIYAMA MASAMORIself22012–2014
KOBAYASHI YUICHI22012–2014
FUKUDA YUZURU12014
Locations
LocationPatentsSpan
Isehara, JP61997–2012
Hadano, JP61990–1994
Tokyo, JP12016
Yokohama, JP12014