Inventor

Bruce B. Pedersen

Inventor

San Jose, CA, US

Overview

1992–2020

Patent span

Electricity

Primary field (CPC H)

Patents· 207 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H03Kprimary

H03KPulse technique48%

G06FElectric digital data processing27%

G11CStatic stores7%

H04LTransmission of digital information, e.g. telegraphic communication5%

G01RMeasuring electric variables5%

G09CCiphering or deciphering apparatus for cryptographic or other purposes involving the need for secrecy4%

H03MCoding2%

G06QInformation and communication technology [ict] specially adapted for administrative, commercial, financial, managerial or supervisory purposes1%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests1%

H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses0%

PatentTitleYear

10,657,291Techniques for protecting security features of integrated circuits2020 10,592,699Systems and methods for detecting and mitigating of programmable logic device tampering2020 10,320,554Differential power analysis resistant encryption and decryption functions2019 10,177,766Omnibus logic element2019 10,142,102Secure physically unclonable function (PUF) error correction2018 10,114,941Systems and methods for authenticating firmware stored on an integrated circuit2018 10,095,889Techniques for protecting security features of integrated circuits2018 10,073,989Systems and methods for preventing data remanence in memory systems2018 10,037,438Setting security features of programmable logic devices2018 9,870,488'Method and apparatus for securing programming data of a programmable device'2018 9,852,315Systems and methods for detecting and mitigating programmable logic device tampering2017 9,837,133Address arithmetic on block RAMs2017 9,832,022Systems and methods for performing reverse order cryptographic operations on data streams2017 9,767,321'Setting security features of programmable logic devices'2017 9,722,778'Security variable scrambling'2017 9,703,989'Secure physically unclonable function (PUF) error correction'2017 9,665,670'Emulation of synchronous pipeline registers in integrated circuits with asynchronous interconnection resources'2017 9,646,177'Systems and methods for preventing data remanence in memory systems'2017 9,590,626'Physically unclonable functions with enhanced margin testing'2017 9,577,643'Secure partial reconfiguration regions'2017 9,577,822'Secure bitstream authentication'2017 9,577,637'Stability-enhanced physically unclonable function circuitry'2017 9,559,881'Transceiver system with reduced latency uncertainty'2017 9,496,875'Omnibus logic element'2016 9,455,715'Apparatus for improving reliability of electronic circuitry and associated methods'2016 9,438,418'Systems and methods for generating a key difficult to clone'2016 9,425,959'Security variable scrambling'2016 9,367,450'Address arithmetic on block RAMs'2016 9,360,522'Methods and apparatus for automatic fault detection'2016 9,331,848'Differential power analysis resistant encryption and decryption functions'2016 9,305,185'Method and apparatus for securing programming data of a programmable device'2016 9,298,799'Method and apparatus for utilizing patterns in data to reduce file size'2016 9,279,850'Physically unclonable functions with enhanced margin testing'2016 9,235,460'Methods and apparatus for automatic fault detection'2016 9,224,433'Method and apparatus for power supply aware memory access operations in an integrated circuit'2015 9,171,185'Programmable logic device with improved security'2015 9,111,121'Method and apparatus for securing a programmable device using a kill switch'2015 9,081,062'Memory error detection and correction circuitry'2015 9,026,873'Method and apparatus for securing configuration scan chains of a programmable device'2015 8,935,645'Reconfigurable logic block'2015 8,924,818'Partial reconfiguration and error detection in an integrated circuit'2014 8,878,567'Omnibus logic element'2014 8,812,869'Programmable logic device with improved security'2014 8,781,118'Digital fingerprints for integrated circuits'2014 8,736,299'Setting security features of programmable logic devices'2014 8,719,957'Systems and methods for detecting and mitigating programmable logic device tampering'2014 8,675,398'Volatile memory elements with soft error upset immunity'2014 8,638,122'Apparatus for metastability-hardened storage circuits and associated methods'2014 8,605,401'Systems and methods for securing a programmable device against an over-voltage attack'2013 8,593,174'Omnibus logic element for packing or fracturing'2013 8,581,617'Systems and methods for providing user-initiated latch up to destroy SRAM data'2013 8,572,538'Reconfigurable logic block'2013 8,482,965'Volatile memory elements with soft error upset immunity'2013 8,461,863'Method and apparatus for securing a programmable device using a kill switch'2013 8,461,869'Apparatus for configuring performance of field programmable gate arrays and associated methods'2013 8,434,044'Specifying placement and routing constraints for security and redundancy'2013 8,381,068'Partial reconfiguration and error detection in an integrated circuit'2013 8,356,019'Method and apparatus for utilizing patterns in data to reduce file size'2013 8,321,773'Hardware true random number generator in integrated circuit with tamper detection'2012 8,255,702'Programmable logic device with improved security'2012 8,237,465'Omnibus logic element for packing or fracturing'2012 8,217,678'Fracturable lookup table and logic element'2012 8,154,912'Volatile memory elements with soft error upset immunity'2012 8,138,786'Apparatus and methods for adjusting performance of integrated circuits'2012 7,928,768'Apparatus for metastability-hardened storage circuits and associated methods'2011 7,911,230'Omnibus logic element for packing or fracturing'2011 7,872,903'Volatile memory elements with soft error upset immunity'2011 7,864,620'Partially reconfigurable memory cell arrays'2011 7,839,167'Interconnection and input/output resources for programmable logic integrated circuit devices'2010 7,800,401'Fracturable lookup table and logic element'2010 7,757,189'Super duplicate register removal'2010 7,671,626'Versatile logic element and logic array block'2010 7,671,625'Omnibus logic element'2010 7,573,317'Apparatus and methods for adjusting performance of integrated circuits'2009 7,538,579'Omnibus logic element'2009 7,492,188'Interconnection and input/output resources for programmable logic integrated circuit devices'2009 7,480,763'Versatile RAM for a programmable logic device'2009 7,441,223'Method and apparatus for performing synthesis to improve density on field programmable gate arrays'2008 7,432,734'Versatile logic element and logic array block'2008 7,406,668'Methods for producing mappings of logic suitable for FPGA and structured ASIC implementations'2008 7,368,942'Dedicated resource interconnects'2008 7,368,944'Organizations of logic modules in programmable logic devices'2008 7,352,610'Volatile memory elements with soft error upset immunity for programmable logic device integrated circuits'2008 7,348,827'Apparatus and methods for adjusting performance of programmable logic devices'2008 7,330,052'Area efficient fractureable logic elements'2008 7,323,902'Fracturable lookup table and logic element'2008 7,317,332'Interconnection and input/output resources for programmable logic integrated circuit devices'2008 7,317,330'Logic circuitry with shared lookup table'2008 7,312,632'Fracturable lookup table and logic element'2007 7,262,635'Interconnection resources for programmable logic integrated circuit devices'2007 7,253,660'Multiplexing device including a hardwired multiplexer in a programmable logic device'2007 7,249,339'Method and apparatus for optimizing delay paths through field programmable gate arrays'2007 7,218,133'Versatile logic element and logic array block'2007 7,185,035'Arithmetic structures for programmable logic devices'2007 7,176,718'Organizations of logic modules in programmable logic devices'2007 7,167,022'Omnibus logic element including look up table based logic elements'2007 7,148,722'PCI-compatible programmable logic devices'2006 7,129,745'Apparatus and methods for adjusting performance of integrated circuits'2006 7,119,575'Logic cell with improved multiplexer, barrel shifter, and crossbarring efficiency'2006 7,111,110'Versatile RAM for programmable logic device'2006 7,100,141'Technology mapping technique for fracturable logic elements'2006 7,061,268'Initializing a carry chain in a programmable logic device'2006 7,042,247'Programmable look-up tables with reduced leakage current'2006 7,030,650'Fracturable incomplete look up table area efficient logic elements'2006 6,995,590'Hybrid phase/delay locked loop circuits and methods'2006 6,989,689'Interconnection and input/output resources for programmable logic integrated circuit devices'2006 6,975,154'Reduced power consumption clock network'2005 6,943,580'Fracturable lookup table and logic element'2005 6,937,064'Versatile logic element and logic array block'2005 6,897,680'Interconnection resources for programmable logic integrated circuit devices'2005 6,897,678'Programmable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuits'2005 6,894,533'Interconnection and input/output resources for programmable logic integrated circuit devices'2005 6,888,373'Fracturable incomplete look up table for area efficient logic elements'2005 6,879,183'Programmable logic device architectures with super-regions having logic regions and a memory region'2005 6,873,181'Automated implementation of non-arithmetic operators in an arithmetic logic cell'2005 6,815,981'Programmable logic array integrated circuit devices'2004 6,798,242'Programmable logic device with hierarchical interconnection resources'2004 6,798,240'Logic circuitry with shared lookup table'2004 6,759,870'Programmable logic array integrated circuits'2004 6,727,727'Interconnection resources for programmable logic integrated circuit devices'2004 6,707,315'Registered logic macrocell with product term allocation and adjacent product term stealing'2004 6,670,825'Efficient arrangement of interconnection resources on programmable logic devices'2003 6,614,261'Interconnection and input/output resources for programable logic integrated circuit devices'2003 6,577,160'Programmable logic device with hierarchical interconnection resources'2003 6,525,564'Interconnection resources for programmable logic integrated circuit devices'2003 6,507,216'Efficient arrangement of interconnection resources on programmable logic devices'2003 6,490,717'Generation of sub-netlists for use in incremental compilation'2002 6,481,000'Programmable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuits'2002 6,417,694'Programmable logic device with hierarchical interconnection resources'2002 6,407,576'Interconnection and input/output resources for programmable logic integrated circuit devices'2002 6,407,450'Semiconductor package with universal substrate for electrically interfacing with different sized chips that have different logic functions'2002 6,392,438'Programmable logic array integrated circuit devices'2002 6,384,625'Programmable logic devices with enhanced multiplexing capabilities'2002 6,366,120'Interconnection resources for programmable logic integrated circuit devices'2002 6,366,121'Programmable logic array integrated circuit architectures'2002 6,366,119'Programmable logic device macrocell with improved logic capability'2002 6,359,468'Programmable logic device with carry look-ahead'2002 6,344,755'Programmable logic device with redundant circuitry'2002 6,342,792'Logic module circuitry for programmable logic devices'2002 6,335,634'Circuitry and methods for internal interconnection of programmable logic devices'2002 6,323,677'Programmable logic device circuitry for improving multiplier speed and/or efficiency'2001 6,323,680'Programmable logic device configured to accommodate multiplication'2001 6,300,794'Programmable logic device with hierarchical interconnection resources'2001 6,300,792'Programmable input/output pin signal multiplexing/demultiplexing circuitry for integrated circuits'2001 6,271,681'PCI-compatible programmable logic devices'2001 6,259,272'Programmable logic array integrated circuit architectures'2001 6,255,846'Programmable logic devices with enhanced multiplexing capabilities'2001 6,249,149'Apparatus and method for centralized generation of an enabled clock signal for a logic array block of a programmable logic device'2001 6,218,859'Programmable logic device having quadrant layout'2001 6,215,326'Programmable logic device architecture with super-regions having logic regions and a memory region'2001 6,204,688'Programmable logic array integrated circuit devices with interleaved logic array blocks'2001 6,201,404'Programmable logic device with redundant circuitry'2001 6,185,725'Apparatus and method for partitioning logic into a programmable logic device'2001 6,169,417'Product-term macrocells for programmable logic device'2001 6,157,208'Programmable logic device macrocell with improved logic capability'2000 6,157,210'Programmable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuits'2000 6,154,055'Programmable logic array integrated circuit devices'2000 6,134,705'Generation of sub-netlists for use in incremental compilation'2000 6,130,555'Driver circuitry for programmable logic devices'2000 6,115,312'Programmable logic device memory cell circuit'2000 6,107,824'Circuitry and methods for internal interconnection of programmable logic devices'2000 6,084,427'Programmable logic devices with enhanced multiplexing capabilities'2000 6,072,332'Variable depth memories for programmable logic devices'2000 6,069,487'Programmable logic device circuitry for improving multiplier speed and/or efficiency'2000 6,066,960'Programmable logic device having combinational logic at inputs to logic elements within logic array blocks'2000 6,045,252'Methods for allocating circuit design portions among physical circuit portions'2000 6,043,676'Wide exclusive or and wide-input and for PLDS'2000 5,999,015'Logic region resources for programmable logic devices'1999 5,986,470'Programmable logic array integrated circuit devices'1999 5,982,195'Programmable logic device architectures'1999 5,977,793'Programmable logic device with hierarchical interconnection resources'1999 5,963,049'Programmable logic array integrated circuit architectures'1999 5,936,425'Tri-statable input/output circuitry for programmable logic'1999 5,926,036'Programmable logic array circuits comprising look up table implementation of fast carry adders and counters'1999 5,909,126'Programmable logic array integrated circuit devices with interleaved logic array blocks'1999 5,898,318'Programmable logic array integrated circuits with enhanced cascade'1999 5,872,463'Routing in programmable logic devices using shared distributed programmable logic connectors'1999 5,861,760'Programmable logic device macrocell with improved capability'1999 5,859,542'Programmable logic array integrated circuits with enhanced cascade'1999 5,850,151'Programmable logic array intergrated circuit devices'1998 5,850,152'Programmable logic array integrated circuit devices'1998 RE035977'Look up table implementation of fast carry arithmetic and exclusive-or operations'1998 5,835,998'Logic cell for programmable logic devices'1998 5,815,003'Programmable logic integrated circuits with partitioned logic element using shared lab-wide signals'1998 5,796,267'Tri-Statable input/output circuitry for programmable logic'1998 5,787,009'Methods for allocating circuit design portions among physical circuit portions'1998 5,761,099'Programmable logic array integrated circuits with enhanced carry routing'1998 5,689,195'Programmable logic array integrated circuit devices'1997 5,670,895'Routing connections for programmable logic array integrated circuits'1997 5,649,163'Method of programming an asynchronous load storage device using a representation of a clear/preset storage device'1997 5,606,266'Programmable logic array integrated circuits with enhanced output routing'1997 5,604,453'Circuit for reducing ground bounce'1997 5,598,108'High-density erasable programmable logic device architecture using multiplexer interconnections, and registered macrocell with product term allocation and adjacent product term stealing'1997 5,572,717'Method and apparatus for assigning and analyzing timing specifications in a computer aided engineering program'1996 5,565,793'Programmable logic array integrated circuit devices with regions of enhanced interconnectivity'1996 5,557,217'High-density erasable programmable logic device architecture using multiplexer interconnections'1996 5,485,103'Programmable logic array with local and global conductors'1996 5,436,575'Programmable logic array integrated circuits'1995 5,384,499'High-density erasable programmable logic device architecture using multiplexer interconnections'1995 5,376,844'Programmable logic device with multiplexer-based programmable interconnections'1994 5,274,581'Look up table implementation of fast carry for adders and counters'1993 5,268,598'High-density erasable programmable logic device architecture using multiplexer interconnections'1993 5,260,610'Programmable logic element interconnections for programmable logic array integrated circuits'1993 5,260,611'Programmable logic array having local and long distance conductors'1993 5,241,224'High-density erasable programmable logic device architecture using multiplexer interconnections'1993 5,220,214'Registered logic macrocell with product term allocation and adjacent product term stealing'1993 5,121,006'Registered logic macrocell with product term allocation and adjacent product term stealing'1992

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1992–2020Patents assigned to ALTERA CORP (205)· patent assignee history

1992–2004Based in Santa Clara, CA, US· patent location history

1995–2019Based in San Jose, CA, US· patent location history

2000Based in San Francisco, CA, US· patent location history

2006–2020Based in Sunnyvale, CA, US· patent location history

2012–2017Patents assigned to PEDERSEN BRUCE B (23)· patent assignee history

2012–2016Patents assigned to PEDERSEN BRUCE (6)· patent assignee history

2012–2013Patents assigned to LEWIS DAVID (4)· patent assignee history

2013–2017Patents assigned to REESE DIRK A (4)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
ALTERA CORP	205	1992–2020
PEDERSEN BRUCE Bself	23	2012–2017
PEDERSEN BRUCEself	6	2012–2016
LEWIS DAVID	4	2012–2013
REESE DIRK A	4	2013–2017

Locations

Location	Patents	Span
San Jose, California, US	109	1995–2019
Sunnyvale, California, US	85	2006–2020
Santa Clara, California, US	12	1992–2004
San Francisco, California, US	1	2000