Inventor

Rama K. Govindaraju

Inventor
Hopewell Junction, NY, US

Overview

50→
Patents
2000–2021
Patent span
Physics
Primary field (CPC G)

Patents· 50 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing69%
H04LTransmission of digital information, e.g. telegraphic communication27%
G06NComputing arrangements based on specific computational models2%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use2%
PatentTitleYear
10,908,964Managing processing system efficiency202110,884,928Data caching202110,481,811Asynchronous copying of data within memory201910,303,604Data caching201910,216,636Controlled cache injection of incoming data201910,218,779Machine level resource distribution201910,191,672Asynchronous copying of data within memory201910,073,817Optimized matrix multiplication using vector multiplication of interleaved matrix values201810,055,350Controlled cache injection of incoming data20189,830,303Optimized matrix multiplication using vector multiplication of interleaved matrix values20179,645,974'Optimized matrix multiplication using vector multiplication of interleaved matrix values'20179,600,417'Data caching'20179,594,687'Virtualization-aware prefetching'20179,436,258'Dynamic service level objective power control in distributed process'20168,605,578'System and method for handling of destination host side congestion'20138,364,849'Snapshot interface operations'20138,140,801'Efficient and flexible memory copy operation'20128,056,087'Effective use of a hardware barrier synchronization register for protocol synchronization'20118,031,639'Efficient probabilistic duplicate packet detector in computer networks'20118,023,417'Failover mechanisms in RDMA operations'20117,996,593'Interrupt handling using simultaneous multi-threading'20117,987,467'Scale across in a grid computing environment'20117,890,703'Cache injection using semi-synchronous memory copy operation'20117,882,321'Validity of address ranges used in semi-synchronous memory copy operations'20117,840,643'System and method for movement of non-aligned data in network buffer model'20107,813,369'Half RDMA and half FIFO operations'20107,774,554'System and method for intelligent software-controlled cache injection'20107,523,260'Propagating data using mirrored lock caches'20097,506,132'Validity of address ranges used in semi-synchronous memory copy operations'20097,493,436'Interrupt handling using simultaneous multi-threading'20097,484,062'Cache injection semi-synchronous memory copy operation'20097,454,585'Efficient and flexible memory copy operation'20087,231,638'Memory sharing in a distributed data processing system using modified address space to create extended address space for copying data'20077,089,289'Mechanisms for efficient message passing with copy avoidance in a distributed system using advanced network devices'20066,934,950'Thread dispatcher for multi-threaded communication library'20056,799,200'Mechanisms for efficient message passing with copy avoidance in a distributed system'20046,735,620'Efficient protocol for retransmit logic in reliable zero copy message transport'20046,700,876'Congestion monitoring and message flow control in a blocking network'20046,542,513'Optimistic, eager rendezvous transmission mode and combined rendezvous modes for message processing systems'20036,389,478'Efficient non-contiguous I/O vector and strided data transfer in one sided communication on multiprocessor computers'20026,256,660'Method and program product for allowing application programs to avoid unnecessary packet arrival interrupts'20016,178,174'Optimistic, eager rendezvous transmission mode and combined rendezvous modes for message processing systems'20016,112,222'Method for resource lock/unlock capability in multithreaded computer environment'20006,111,894'Hardware interface between a switch adapter and a communications subsystem in a data processing system'20006,105,050'System for resource lock/unlock capability in multithreaded computer environment'20006,105,049'Resource lock/unlock capability in multithreaded computer environment'20006,070,189'Signaling communication events in a computer network'20006,038,604'Method and apparatus for efficient communications using active messages'20006,035,335'Optimistic, eager rendezvous transmission system and combined rendezvous system for message processing, and related data structures'20006,012,121'Apparatus for flexible control of interrupts in multiprocessor systems'2000

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2000–2013Patents assigned to IBM (35)· patent assignee history
2000–2006Based in Poughkeepsie, NY, US· patent location history
2007–2013Based in Hopewell Junction, NY, US· patent location history
2012–2013Patents assigned to GOVINDARAJU RAMA K (3)· patent assignee history
2012–2013Patents assigned to HOCHSCHILD PETER H (2)· patent assignee history
2013–2017Patents assigned to GOOGLE INC (6)· patent assignee history
2013–2021Based in San Jose, CA, US· patent location history
2018–2021Patents assigned to GOOGLE LLC (9)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
IBM352000–2013
GOOGLE LLC92018–2021
GOOGLE INC62013–2017
GOVINDARAJU RAMA Kself32012–2013
HOCHSCHILD PETER H22012–2013
Locations
LocationPatentsSpan
Hopewell Junction, New York, US182007–2013
Poughkeepsie, New York, US172000–2006
San Jose, California, US152013–2021