LexDanaLexDanabeta
Inventor

Chao Zhao

Inventor
Kessel-Lo, BE

Overview

69→
Patents
2007–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 69 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices23%
H01LSemiconductor devices19%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1016%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h109%
H04WWireless communication networks3%
C23CCoating metallic material3%
H04LTransmission of digital information, e.g. telegraphic communication3%
G06FElectric digital data processing2%
H04BTransmission2%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation2%
PatentTitleYear
11,019,255Depth imaging system and method of rendering a processed image to include in-focus and out-of-focus regions of one or more objects based on user selection of an object202111,019,280Systems and methods for video processing and display202110,880,822Device-to-device communication method, terminal, and network device202010,827,852Dual-chamber package system for absorbent articles202010,784,410Molecular coatings of nitride semiconductors for optoelectronics, electronics, and solar energy harvesting202010,665,451Nanowires-based light emitters on thermally and electrically conductive substrates and of making same202010,480,719Ultrabroad linewidth orange-emitting nanowires LED for high CRI laser-based white lighting and gigahertz communications201910,457,978Cyclopentane-peptide nucleic acids for qualitative and quantitative detection of nucleic acids201910,440,624Data transmission control method, apparatus and system201910,376,885Microfluidic concentrator for label-free, continuous nanoparticle processing201910,336,896One-pot synthesis of highly mechanical and recoverable double-network hydrogels201910,312,345Transistor having a gate with a variable work function and method for manufacturing the same201910,276,366Low interface state device and method for manufacturing the same201910,264,576Method for uplink data transmission, terminal, and wireless communication node201910,234,895Clock synthesizer with hitless reference switching and frequency stabilization201910,157,956Method of monolithic integration of hyperspectral image sensor201810,141,408Method and arrangement for reducing contact resistance of two-dimensional crystal material201810,119,898Particle screening device201810,115,804Method for manufacturing semiconductor device201810,068,803Planarization process201810,064,078Wireless communications method, user equipment, and network node201810,062,775GaN-based power electronic device and method for manufacturing the same20189,954,071Method for preparing titanium-aluminum alloy thin film20189,949,194Data transmission control method, apparatus and system20189,899,270'Methods for manufacturing semiconductor devices'20189,877,273Device-to-device communication method, terminal, and network device20189,773,707'Method for manufacturing semiconductor device'20179,589,809'Method of depositing tungsten layer with improved adhesion and filling behavior'20179,425,288'Method of manufacturing semiconductor device'20169,419,095'Method for manufacturing dummy gate in gate-last process and dummy gate in gate-last process'20169,419,108'Semiconductor structure and method for manufacturing the same'20169,412,657'Method for manufacturing semiconductor device'20169,406,549'Planarization process'20169,397,007'Method for manufacturing semiconductor structure through forming an additional layer inside opening of a photoresist layer'20169,331,172'Method for making HKMG dummy gate structure with amorphous/ONO masking structure and procedure'20169,306,016'Semiconductor device and method for manufacturing the same'20169,224,589'Method for eliminating contact bridge in contact hole process'20159,223,374'Power sourcing equipment chip power sourcing equipment and power over ethernet system and method using registers and slave address'20159,202,890'Method for manufacturing dummy gate in gate-last process and dummy gate in gate-last process'20159,136,160'Solid hole array and method for forming the same'20159,111,863'Method for manufacturing dummy gate in gate-last process and dummy gate in gate-last process'20159,070,719'Semiconductor device structure, method for manufacturing the same, and method for manufacturing Fin'20159,049,061'CMOS device and method for manufacturing the same'20159,024,435'Semiconductor device, formation method thereof, and package structure'20159,012,965'Semiconductor device and manufacturing method thereof'20158,994,119'Semiconductor device with gate stacks having stress and method of manufacturing the same'20158,987,127'Method for manufacturing semiconductor device'20158,946,071'Method for manufacturing semiconductor device'20158,816,326'Semiconductor device and manufacturing method thereof'20148,802,518'Semiconducor device and method for manufacturing the same'20148,779,475'Semiconductor device and method of manufacturing the same'20148,749,067'Semiconductor device and method for forming the same'20148,748,983'Embedded source/drain MOS transistor'20148,703,567'Method for manufacturing a semiconductor device'20148,686,534'Trench isolation structure and method for forming the same'20148,685,851'MOS device with memory function and manufacturing method thereof'20148,647,987'Method for improving uniformity of chemical-mechanical planarization process'20148,642,433'Method for manufacturing semiconductor device'20148,575,019'Metal interconnection structure and method for forming metal interlayer via and metal interconnection line'20138,557,677'Stack-type semiconductor device and method for manufacturing the same'20138,541,296'Method of manufacturing dummy gates in gate last process'20138,536,053'Method for restricting lateral encroachment of metal silicide into channel region'20138,501,500'Method for monitoring the removal of polysilicon pseudo gates'20138,486,805'Through-silicon via and method for forming the same'20138,455,323'Method for manufacturing semiconductor wafer'20138,420,492'MOS transistor and method for forming the same'20138,409,986'Method for improving within die uniformity of metal plug chemical mechanical planarization process in gate last route'20138,252,689'Chemical-mechanical planarization method and method for fabricating metal gate in gate-last process'20127,183,604'High dielectric constant device'2007

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2007–2019Based in Kessel-Lo, BE· patent location history
2012–2019Patents assigned to INST OF MICROELECTRONICS CAS (43)· patent assignee history
2012–2019Patents assigned to ZHAO CHAO (34)· patent assignee history
2012–2015Patents assigned to CHEN DAPENG (9)· patent assignee history
2013–2016Patents assigned to ZHONG HUICAI (13)· patent assignee history
2013–2016Patents assigned to LIANG QINGQING (10)· patent assignee history
2016–2018Based in BE· patent location history
2017–2020Based in Beijing, CN· patent location history
2018–2021Based in Shenzhen, CN· patent location history
2019–2020Based in Thuwal, SA· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
INST OF MICROELECTRONICS CAS432012–2019
ZHAO CHAOself342012–2019
ZHONG HUICAI132013–2016
LIANG QINGQING102013–2016
CHEN DAPENG92012–2015
Locations
LocationPatentsSpan
Kessel-Lo, BE442007–2019
Shenzhen, CN82018–2021
Beijing, CN42017–2020
Thuwal, SA32019–2020
BE22016–2018