Inventor

Karen E. Moore

Inventor
Phoenix, AZ, US

Overview

24→
Patents
1997–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 24 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices32%
H01LSemiconductor devices18%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1017%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1017%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests8%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices3%
C07KPeptides2%
C12NMicroorganisms or enzymes2%
C12QMeasuring or testing processes involving enzymes, nucleic acids or microorganisms2%
PatentTitleYear
10,825,924Semiconductor device with selectively etched surface passivation202010,541,324Semiconductor device with a recessed ohmic contact and methods of fabrication202010,522,670Semiconductor device with selectively etched surface passivation20199,799,760'Semiconductor device with selectively etched surface passivation'20179,685,345'Semiconductor devices with integrated Schottky diodes and methods of fabrication'20179,281,204'Method for improving E-beam lithography gate metal profile for enhanced field control'20169,276,101'High speed gallium nitride transistor devices'20169,153,448'Semiconductor device with selectively etched surface passivation'20159,123,645'Methods of making semiconductor devices with low leakage Schottky contacts'20159,111,868'Semiconductor device with selectively etched surface passivation'20159,099,433'High speed gallium nitride transistor devices'20158,946,776'Semiconductor device with selectively etched surface passivation'20158,927,214'Methods and compositions for dual extraction of protein and nucleic acid'20158,592,878'Semiconductor devices with low leakage Schottky contacts'20137,935,620'Method for forming semiconductor devices with low leakage Schottky contacts'20116,630,746'Semiconductor device and method of making the same'20036,180,495'Silicon carbide transistor and method therefor'20016,127,272'Method of electron beam lithography on very high resistivity substrates'20006,083,806'Method of forming an alignment mark'20006,002,148'Silicon carbide transistor and method'19995,933,750'Method of fabricating a semiconductor device with a thinned substrate'19995,885,860'Silicon carbide transistor and method'19995,693,969'MESFET having a termination layer in the channel layer'19975,641,695'Method of forming a silicon carbide JFET'1997

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1997–2003Patents assigned to MOTOROLA INC (9)· patent assignee history
1997–2020Based in Phoenix, AZ, US· patent location history
2011–2017Patents assigned to FREESCALE SEMICONDUCTOR INC (10)· patent assignee history
2013–2017Patents assigned to GREEN BRUCE M (6)· patent assignee history
2013–2017Patents assigned to MOORE KAREN E (6)· patent assignee history
2015Based in Durham, NC, US· patent location history
2017–2020Patents assigned to NXP USA INC (5)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
FREESCALE SEMICONDUCTOR INC102011–2017
MOTOROLA INC91997–2003
GREEN BRUCE M62013–2017
MOORE KAREN Eself62013–2017
NXP USA INC52017–2020
Locations
LocationPatentsSpan
Phoenix, AZ, US231997–2020
Durham, NC, US12015