Inventor
Kazuhisa Ninomiya
Inventor
Tokyo, JP
Overview
Patents· 20 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
A61Kprimary
A61KPreparations for medical, dental or toiletry purposes28%
G11CStatic stores23%
A61PSpecific therapeutic activity of chemical compounds or medicinal preparations15%
A61LMethods or apparatus for sterilising materials or objects in general8%
Y10TTechnical subjects covered by former us classification8%
A61FFilters implantable into blood vessels5%
G06FElectric digital data processing5%
B29CShaping or joining of plastics3%
B29KIndexing scheme associated with subclasses b29b, b29c or b29d, relating to moulding materials or to materials for moulds, reinforcements, fillers or preformed parts, e.g. inserts3%
B29LIndexing scheme associated with subclass b29c, relating to particular articles3%
PatentTitleYear
8,591,939'Adhesive preparation containing fentanyl'20138,506,991'Nicotine transdermal preparation and production method thereof'20138,394,404'Adhesive material and adhesive preparation'20138,327,903'Manufacturing apparatus of transdermal absorption preparation'20127,650,994'Adhesive preparation package'20106,676,960'Intraoral adhesive preparation'20046,407,954'Nonvolatile semiconductor memory device'20026,387,392'Intraoral adhesive preparation'20026,090,405'Buprenorphine percutaneous absorption preparation'20005,998,831'Non-volatile semiconductor memory device'19995,882,675'Percutaneous absorption preparation'19995,618,555'Percutaneous absorption preparation'19975,617,359'Electrically erasable and programmable read only memory device with source voltage controller for quickly erasing data'19975,608,671'Non-volatile semiconductor memory'19975,532,959'Electrically erasable and programmable read only memory device equipped with inspection circuit for threshold levels of memory cells'19965,333,122'Electrically erasable and programmable non-volatile semiconductor memory device having word line voltage control circuit using internal voltage booster circuit'19945,327,384'Flash memory'19945,305,260'Electrically erasable and programmable read only memory device verifiable with standard external power voltage level'19945,297,095'Semiconductor non-volatile memory device improved in verifying operation for erased and write-in states'19944,740,374'Anti-inflammatory analgesic adhesive preparation'1988Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1988–2000Based in Osaka, JP· patent location history
1994–2002Patents assigned to NEC CORP (9)· patent assignee history
1994–2002Based in Tokyo, JP· patent location history
1999–2013Patents assigned to NITTO DENKO CORP (9)· patent assignee history
2002–2013Based in Ibaraki, JP· patent location history
2012–2013Patents assigned to NINOMIYA KAZUHISA (4)· patent assignee history
2012–2013Patents assigned to AKEMI HITOSHI (3)· patent assignee history
2013Patents assigned to MATSUOKA KENSUKE (3)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| NEC CORP | 9 | 1994–2002 |
| NITTO DENKO CORP | 9 | 1999–2013 |
| NINOMIYA KAZUHISAself | 4 | 2012–2013 |
| AKEMI HITOSHI | 3 | 2012–2013 |
| MATSUOKA KENSUKE | 3 | 2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Tokyo, JP | 9 | 1994–2002 |
| Ibaraki, JP | 7 | 2002–2013 |
| Osaka, JP | 4 | 1988–2000 |