Inventor
Seung-Keun Lee
Inventor
Gyeonggi-do, KR
Overview
Patents· 46 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores67%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems7%
H03KPulse technique7%
E02FDredging3%
H10DInorganic electric semiconductor devices3%
B62DMotor vehicles2%
G01RMeasuring electric variables2%
G04BMechanically-driven clocks or watches2%
G06FElectric digital data processing2%
G11BInformation storage based on relative movement between record carrier and transducer2%
PatentTitleYear
9,312,024'Flash memory device having efficient refresh operation'20168,190,606'System for providing lyrics for digital audio files'20127,668,011'Serial flash memory device and precharging method thereof'20107,656,714'Bitline bias circuit and nor flash memory device including the bitline bias circuit'20107,428,169'Nonvolatile semiconductor memory device and voltage generating circuit for the same'20087,427,888'Charge pump circuit operating responsive to a mode'20087,394,719'Flash memory device with burst read mode of operation'20087,352,618'Multi-level cell memory device and associated read method'20087,327,609'Methods of program-verifying a multi-bit nonvolatile memory device and circuit thereof'20087,286,411'Row decoder circuit for use in non-volatile memory device'20077,271,436'Flash memory devices including a pass transistor'20077,254,061'Memory devices using tri-state buffers to discharge data lines, and methods of operating same'20077,142,457'Non-volatile semiconductor memory device'20067,082,058'Non-volatile semiconductor memory device having sense amplifier with increased speed'20067,079,417'Read-while-write flash memory devices having local row decoder circuits activated by separate read and write signals'20067,054,199'Multi level flash memory device and program method'20067,042,795'Flash memory device with burst read mode of operation'20067,016,232'Non-volatile semiconductor memory device'20067,002,869'Voltage regulator circuit'20066,970,384'Programming method of flash memory device'20056,944,085'Semiconductor memory device with reduced chip area and improved redundancy efficency'20056,867,628'Semiconductor memory delay circuit'20056,842,384'Nonvolatile semiconductor memory with power-up read mode'20056,831,860'Nonvolatile semiconductor memory device'20046,781,904'Low-voltage semiconductor memory device'20046,778,000'Integrated circuit devices that provide constant time delays irrespective of temperature variation'20046,690,227'Charge pump circuit for use in high voltage generating circuit'20046,665,229'Semiconductor memory device row decoder structures having reduced layout area, and methods of operating the same'20036,654,290'Flash memory device with cell current measuring scheme using write driver'20036,587,375'Row decoder for a nonvolatile memory device'20036,542,406'Row decoder of a NOR-type flash memory device'20036,507,522'Method for erasing memory cells in a nonvolatile memory'20036,442,079'Voltage regulator circuit for a semiconductor memory device'20025,984,040'Pedal locking device for a loader'19995,986,947'Charge pump circuits having floating wells'19995,963,475'Advanced nonvolatile memories adaptable to dynamic random access memories and methods of operating therein'19995,929,691'Mode setting circuit for a memory device'19995,920,504'Semiconductor memory having embedding lockable cells'19995,805,498'Nonvolatile semiconductor memory device having a sense amplifier coupled to memory cell strings with reduced number of selection transistors'19985,740,107'Nonvolatile integrated circuit memories having separate read/write paths'19985,663,920'Semiconductor memory word line driver circuit'19975,547,244'Canopy mounting device for a skid steer loader'19965,471,429'Burn-in circuit and method therefor of semiconductor memory device'19955,390,150'Semiconductor memory device with redundancy structure suppressing power consumption'19955,315,173'Data buffer circuit with delay circuit to increase the length of a switching transition period during data signal inversion'19945,157,279'Data output driver with substrate biasing producing high output gain'1992Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1992–2010Patents assigned to SAMSUNG ELECTRONICS CO LTD (39)· patent assignee history
1992–2002Based in Seoul, KR· patent location history
1996–1999Patents assigned to DAEWOO HEAVY IND CO LTD (2)· patent assignee history
1996–2012Based in Incheon, KR· patent location history
1999–2005Based in Kyungki-do, KR· patent location history
2004–2008Based in Gyeonggi-do, KR· patent location history
2008–2016Based in Yongin-si, KR· patent location history
2010Patents assigned to EXCEL SEMICONDUCTOR INC (1)· patent assignee history
2012Patents assigned to KIM MYUNG GU (1)· patent assignee history
2016Patents assigned to FIDELIX CO LTD (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SAMSUNG ELECTRONICS CO LTD | 39 | 1992–2010 |
| DAEWOO HEAVY IND CO LTD | 2 | 1996–1999 |
| EXCEL SEMICONDUCTOR INC | 1 | 2010 |
| FIDELIX CO LTD | 1 | 2016 |
| KIM MYUNG GU | 1 | 2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| Gyeonggi-do, KR | 16 | 2004–2008 |
| Kyungki-do, KR | 8 | 1999–2005 |
| Seoul, KR | 8 | 1992–2002 |
| Yongin-si, KR | 5 | 2008–2016 |
| Incheon, KR | 3 | 1996–2012 |