Inventor
Mihir Choudhury
Inventor
New York, NY, US
Overview
Patents· 6 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing57%
G11CStatic stores14%
H03KPulse technique14%
H03MCoding14%
PatentTitleYear
10,776,543Automated region based optimization of chip manufacture202010,037,190Transformation on input operands to reduce hardware overhead for implementing addition20188,683,398'Automated synthesis of high-performance two operand binary parallel prefix adder'20148,527,920'Automated synthesis of high-performance two operand binary parallel prefix adder'20138,493,120'Storage circuitry and method with increased resilience to single event upsets'20137,979,666'System and method for context-independent codes for off-chip interconnects'2011Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2011Patents assigned to UNIV RICE WILLIAM M (1)· patent assignee history
2011Based in Houston, TX, US· patent location history
2013–2020Patents assigned to IBM (4)· patent assignee history
2013Patents assigned to ADVANCED RISC MACH LTD (1)· patent assignee history
2013Patents assigned to CHANDRA VIKAS (1)· patent assignee history
2013Patents assigned to CHOUDHURY MIHIR RAJANIKANT (1)· patent assignee history
2013–2020Based in New York, NY, US· patent location history
2013Based in San Jose, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 4 | 2013–2020 |
| ADVANCED RISC MACH LTD | 1 | 2013 |
| CHANDRA VIKAS | 1 | 2013 |
| CHOUDHURY MIHIR RAJANIKANTself | 1 | 2013 |
| UNIV RICE WILLIAM M | 1 | 2011 |
Locations
| Location | Patents | Span |
|---|---|---|
| New York, New York, US | 4 | 2013–2020 |
| San Jose, California, US | 1 | 2013 |
| Houston, Texas, US | 1 | 2011 |