Inventor
Paul J. Garnett
Inventor
Camberley, GB
Overview
Patents· 75 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing37%
H05KPrinted circuits18%
G11BInformation storage based on relative movement between record carrier and transducer16%
H04LTransmission of digital information, e.g. telegraphic communication16%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%
G01RMeasuring electric variables2%
H02JElectric power networks2%
H03MCoding2%
LOC142%
F04DNon-positive-displacement pumps1%
PatentTitleYear
7,987,223'Interfacing computer modules'20117,962,721'Method and apparatus for management of bus transactions relating to shared resources'20117,690,888'Fan grill'20107,415,011'Distributed switch'20087,385,797'Power problem diagnosis'20087,325,154'Service redundancy'20087,321,312'Non-volatile fault indication'20087,299,495'Virus detection'20077,295,442'System management'20077,289,319'Extended computing system'20077,245,632'External storage for modular computer systems'20077,237,082'Spatially distributed parity protection'20077,232,332'Support and grounding structure'20077,227,748'Cooling module'20077,224,581'Extended computer systems'20077,225,235'Computer system console access'20077,225,276'Configuring external network connections'20077,209,358'Aggregation switch'20077,193,844'Computer system storage'20077,164,587'Integral heatsink grounding arrangement'20077,158,781'System management'20077,129,851'Indicator feedback mechanism'20067,124,321'Adaptive throttling'20067,124,319'Delay compensation for synchronous processing sets'20067,114,994'Computer connections'20067,099,984'Method and system for handling interrupts and other communications in the presence of multiple processing sets'20067,100,041'Configuring computer systems'20067,079,395'Extended computing system'20067,065,599'Multiprocessor systems'20067,062,575'System and method for interfacing computer system information protocol interface modules'20067,039,817'Method and apparatus for supplying power to a processor at a controlled voltage'20067,032,037'Server blade for performing load balancing functions'20067,024,551'Method and apparatus for updating boot code using a system controller'20067,013,352'Interface standard support in modular computer systems'20067,012,815'Computer systems'20066,999,312'Heatsink apparatus'20066,980,427'Removable media'20056,981,172'Protection for memory modification tracking'20056,967,487'Distributed diode fault check'20056,961,826'Processor state reintegration using bridge direct memory access controller'20056,950,907'Enhanced protection for memory modification tracking with redundant dirty indicators'20056,947,281'Cooling units'20056,947,864'Latent fault detection in redundant power supply systems'20056,944,019'Integrity monitoring'20056,924,977'Computer system cooling'2005D0504425'Computer housing'20056,869,314'Computer connections'20056,862,645'Computer system'20056,858,796'Grounding mechanism retention feature'20056,856,513'Media drive mount'20056,851,614'Computer configuration'20056,829,141'Cooling power supplies'20046,785,763'Efficient memory modification tracking with hierarchical dirty indicators'20046,785,777'Control logic for memory modification tracking with hierarchical dirty indicators'2004D0494578'Computer equipment'20046,778,386'Cooling computer systems'20046,718,472'System for suspending power to a field replaceable unit upon receiving fault signal and automatically reapplying power thereto after the replacement unit is secured in position'2004D0485835'Computer equipment'20046,587,961'Multi-processor system bridge with controlled access'20036,356,637'Field programmable gate arrays'20026,262,493'Providing standby power to field replaceable units for electronic systems'20016,260,159'Tracking memory page modification in a bridge for a multi-processor system'20016,223,230'Direct memory access in a bridge for a multi-processor system'20016,173,351'Multi-processor system bridge'20016,167,477'Computer system bridge employing a resource control mechanism with programmable registers to control resource allocation'20006,148,348'Bridge interfacing two processing sets operating in a lockstep mode and having a posted write buffer storing write operations upon detection of a lockstep error'20006,141,718'Processor bridge with dissimilar data registers which is operable to disregard data differences for dissimilar data direct memory accesses'20006,138,198'Processor bridge with dissimilar data registers which is operable to disregard data differences for dissimilar data write accesses'20006,038,048'Apparatus for communication between multiple processing modules'20005,991,900'Bus controller'19995,974,489'Computer bus expansion'19995,969,648'Quaternary signal encoding'19995,912,563'Trinary signal apparatus and method'19995,911,778'Processing system security'19995,903,233'Extended binary apparatus and method'1999Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1999–2010Patents assigned to SUN MICROSYSTEMS INC (72)· patent assignee history
1999Patents assigned to SUN MICRO SYSTEMS (1)· patent assignee history
1999–2003Based in Newton-le-Willows, GB· patent location history
1999–2000Based in Merseyside, GB· patent location history
2001–2011Based in Camberley, GB· patent location history
2011Patents assigned to ORACLE AMERICA INC (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SUN MICROSYSTEMS INC | 72 | 1999–2010 |
| ORACLE AMERICA INC | 2 | 2011 |
| SUN MICRO SYSTEMS | 1 | 1999 |
Locations
| Location | Patents | Span |
|---|---|---|
| Camberley, GB | 59 | 2001–2011 |
| Newton-le-Willows, GB | 11 | 1999–2003 |
| Merseyside, GB | 5 | 1999–2000 |