Inventor
Yi-ting FU
Inventor
TW
Overview
Patents· 8 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices33%
H10DInorganic electric semiconductor devices33%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1025%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h108%
PatentTitleYear
12,406,848Method of fabricating a gate cut feature for multi-gate semiconductor devices202512,243,782Local gate height tuning by CMP and dummy gate design202512,142,608Semiconductor device and method for making the same202412,051,735Dielectric spacer to prevent contacting shorting202411,817,354Local gate height tuning by cmp and dummy gate design202311,652,106Semiconductor device and method for making the same202311,508,623Local gate height tuning by CMP and dummy gate design202211,342,444Dielectric spacer to prevent contacting shorting2022Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2022–2025Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (8)· patent assignee history
2022–2025Based in TW· patent location history
2025Patents assigned to TAIWAN SEMICONDUCTOR MFG C0 LTD (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 8 | 2022–2025 |
| TAIWAN SEMICONDUCTOR MFG C0 LTD | 1 | 2025 |
Locations
| Location | Patents | Span |
|---|---|---|
| TW | 8 | 2022–2025 |