Inventor
Bernhard H. Andresen
Inventor
Dallas, TX, US
Overview
Patents· 33 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Kprimary
H03KPulse technique35%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses18%
H10DInorganic electric semiconductor devices12%
G06FElectric digital data processing8%
G01RMeasuring electric variables6%
G03BApparatus or arrangements for taking photographs or for projecting or viewing them6%
G02BOptical elements, systems or apparatus4%
B06BMethods or apparatus for generating or transmitting mechanical vibrations of infrasonic, sonic, or ultrasonic frequency, e.g. for performing mechanical work in general2%
G01SRadio direction-finding2%
H03BGeneration of oscillations, directly or by frequency-changing, by circuits employing active elements which operate in a non-switching manner2%
PatentTitleYear
6,633,468'High voltage protection circuit for improved oxide reliability'20036,535,368'Shared 5 volt tolerant ESD protection circuit for low voltage CMOS process'20036,487,687'Voltage level shifter with testable cascode devices'20026,445,229'Digital phase lock loop'20026,380,786'Digital phase lock loop'20026,353,520'Shared 5 volt tolerant ESD protection circuit for low voltage CMOS process'20026,310,379'NMOS triggered NMOS ESD protection circuit using low voltage NMOS transistors'20016,294,943'Method of designing fail-safe CMOS I/O buffers whose external nodes accept voltages higher than the maximum gate oxide operating voltage'20016,211,693'Testability circuit for cascode circuits used for high voltage interface'20016,147,538'CMOS triggered NMOS ESD protection circuit'20006,115,438'Method and circuit for detecting a spurious lock signal from a lock detect circuit'20006,115,439'Free running digital phase lock loop'20006,081,002'Lateral SCR structure for ESD protection in trench isolated technologies'20006,040,708'Output buffer having quasi-failsafe operation'20005,995,010'Output buffer providing testability'19995,982,213'Digital phase lock loop'19995,844,954'Fine resolution digital delay line with coarse and fine adjustment stages'19985,808,478'Digitally controlled output buffer to incrementally match line impedance and maintain slew rate independent of capacitive output loading'19985,802,270'Integrated circuit having an embedded digital signal processor and externally testable signal paths'19985,764,077'5 volt tolerant I/O buffer circuit'19985,621,335'Digitally controlled output buffer to incrementally match line impedance and maintain slew rate independent of capacitive output loading'19975,544,203'Fine resolution digital delay line with coarse and fine adjustment stages'19965,355,037'High performance digital phase locked loop'19945,004,936'Non-loading output driver circuit'19914,612,499'Test input demultiplexing circuit'19864,544,257'Automatic exposure control for a camera shutter'19854,511,234'Gain switching amplifier'19854,496,914'Piezo harn self-oscillating drive circuit'19854,365,878'Signal processing circuitry for a distance measuring system'19824,363,540'Exposure information storage device for a photographic camera'19824,300,824'Signal processing circuitry for a distance measuring system'19814,110,707'Indirect FM modulation scheme using phase locked loop'19784,091,335'Phase locked loop using current controlled ring oscillator'1978Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1978–2003Patents assigned to TEXAS INSTRUMENTS INC (30)· patent assignee history
1978–2003Based in Dallas, TX, US· patent location history
1981–1982Patents assigned to CANON KK (3)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TEXAS INSTRUMENTS INC | 30 | 1978–2003 |
| CANON KK | 3 | 1981–1982 |
Locations
| Location | Patents | Span |
|---|---|---|
| Dallas, Texas, US | 33 | 1978–2003 |