Inventor

HyungMin Lee

Inventor
Seoul, KR

Overview

20→
Patents
2011–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 20 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1023%
H01LSemiconductor devices14%
H05KPrinted circuits11%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%
C30BSingle-crystal growth9%
G06FElectric digital data processing7%
G03HHolographic processes or apparatus5%
G06TImage data processing or generation, in general5%
H10DInorganic electric semiconductor devices5%
G02BOptical elements, systems or apparatus2%
PatentTitleYear
11,119,444Slim backlight unit for holographic display device and holographic display device including the same202111,073,794Holographic display apparatus and method for providing expanded viewing window202110,793,969Sample rod growth and resistivity measurement during single crystal silicon ingot production202010,781,532Methods for determining the resistivity of a polycrystalline silicon melt202010,513,796Methods for producing low oxygen silicon ingots2019D0853398Electronic cover with light animation201910,043,488Electronic device and method of controlling display thereof20189,951,440Methods for producing low oxygen silicon ingots20189,898,096'Electronic device and method of controlling display of screen thereof'20189,594,473'Sound visualization method and apparatus of electronic device'20179,391,046'Semiconductor device and method of forming 3D semiconductor package with semiconductor die stacked over semiconductor wafer'20169,305,897'Semiconductor package and method of mounting semiconductor die to opposite sides of TSV substrate'20169,190,297'Semiconductor device and method of forming a stackable semiconductor package with vertically-oriented discrete electrical devices as interconnect structures'20159,153,476'Semiconductor device and method of forming prefabricated multi-die leadframe for electrical interconnect of stacked semiconductor die'20158,710,668'Integrated circuit packaging system with laser hole and method of manufacture thereof'20148,710,634'Integrated circuit packaging system with an integral-interposer-structure and method of manufacture thereof'20148,648,469'Semiconductor package and method of mounting semiconductor die to opposite sides of TSV substrate'20148,426,955'Integrated circuit packaging system with a stack package and method of manufacture thereof'20138,357,564'Semiconductor device and method of forming prefabricated multi-die leadframe for electrical interconnect of stacked semiconductor die'20138,008,121'Semiconductor package and method of mounting semiconductor die to opposite sides of TSV substrate'2011

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2011–2016Patents assigned to STATS CHIPPAC LTD (9)· patent assignee history
2011–2016Based in Gyeonggi-do, KR· patent location history
2013–2016Patents assigned to LEE HYUNGMIN (7)· patent assignee history
2013–2016Patents assigned to CHI HEEJO (5)· patent assignee history
2013–2015Patents assigned to PARK YEONGIM (4)· patent assignee history
2013–2014Based in Bucheon-si, KR· patent location history
2017–2021Patents assigned to SAMSUNG ELECTRONICS CO LTD (6)· patent assignee history
2017–2021Based in Seoul, KR· patent location history
2018–2019Based in Cheonan, SK· patent location history
2020Based in Cheonan-si, KR· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
STATS CHIPPAC LTD92011–2016
LEE HYUNGMINself72013–2016
SAMSUNG ELECTRONICS CO LTD62017–2021
CHI HEEJO52013–2016
PARK YEONGIM42013–2015
Locations
LocationPatentsSpan
Seoul, KR62017–2021
Gyeonggi-do, KR62011–2016
Bucheon-si, KR32013–2014
Cheonan-si, KR22020
Cheonan, SK22018–2019