Inventor
Bum Ki Moon
Inventor
Lagrangeville, NY, US
Overview
Patents· 42 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices25%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1013%
H01GCapacitors9%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h108%
Y02EReduction of greenhouse gas [ghg] emissions, related to energy generation, transmission or distribution8%
H10BElectronic memory devices8%
Y10TTechnical subjects covered by former us classification6%
H01LSemiconductor devices4%
H01MProcesses or means, e.g. batteries, for the direct conversion of chemical energy into electrical energy4%
Y02PClimate change mitigation technologies in the production or processing of goods4%
PatentTitleYear
10,217,996Particle-based silicon electrodes for energy storage devices201910,008,560Capacitors in integrated circuits and methods of fabrication thereof20189,947,485Three dimensional energy storage device, method of manufacturing same, and mobile electronic device containing same20189,928,966'Nanostructured electrolytic energy storage devices'20189,859,565'Ultrafast reliable silicon enabled battery and associated methods'20189,685,278'Energy storage devices having enhanced specific energy and associated methods'20179,640,332'Hybrid electrochemical capacitor'20179,484,576'Particle-based silicon electrodes for energy storage devices'20169,425,140'Capacitors in integrated circuits and methods of fabrication thereof'20169,355,790'Energy storage devices having enhanced specific energy and associated methods'20169,194,036'Plasma vapor deposition'20159,093,226'Energy storage device, method of manufacturing same, and mobile electronic device containing same'20158,636,879'Electro chemical deposition systems and methods of manufacturing using the same'20148,618,635'Capacitors in integrated circuits and methods of fabrication thereof'20138,432,041'Semiconductor devices and methods of manufacture thereof'20138,373,273'Methods of forming integrated circuit devices having damascene interconnects therein with metal diffusion barrier layers and devices formed thereby'20138,232,200'Methods of forming integrated circuit devices having damascene interconnects therein with metal diffusion barrier layers and devices formed thereby'20128,197,660'Electro chemical deposition systems and methods of manufacturing using the same'20127,898,082'Nitrogen rich barrier layers and methods of fabrication thereof'20117,879,720'Methods of forming electrical interconnects using electroless plating techniques that inhibit void formation'20117,713,866'Semiconductor devices and methods of manufacture thereof'20107,504,680'Semiconductor device and mask pattern'20097,473,565'Semiconductor device and method of manufacturing the same'20097,399,702'Methods of forming silicide'20087,229,918'Nitrogen rich barrier layers and methods of fabrication thereof'20077,198,959'Process for fabrication of a ferrocapacitor'20077,169,658'Method for formation of an ultra-thin film and semiconductor device containing such a film'20077,119,021'Ferroelectric capacitor devices and a method for compensating for damage to a capacitor caused by etching'20067,105,400'Manufacturing method of semiconductor device'20067,071,506'Device for inhibiting hydrogen damage in ferroelectric capacitor devices'20067,042,037'Semiconductor device'20067,031,138'Ferroelectric capacitor and process for its manufacture'20067,009,230'Barrier stack with improved barrier properties'20066,924,519'Semiconductor device with perovskite capacitor'20056,924,521'Semiconductor device comprising a capacitor using a ferroelectric material'20056,891,713'Element storage layer in integrated circuits'20056,839,220'Multi-layer barrier allowing recovery anneal for ferroelectric capacitors'20056,787,831'Barrier stack with improved barrier properties'20046,621,683'Memory cells with improved reliability'20036,614,642'Capacitor over plug structure'20036,583,507'Barrier for capacitor over plug structures'20034,986,109'Abrasion-proof tester'1991Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2003–2018Patents assigned to INFINEON TECHNOLOGIES AG (28)· patent assignee history
2003–2009Patents assigned to TOSHIBA KK (6)· patent assignee history
2003–2009Based in Tokyo, JP· patent location history
2006–2009Based in Poughkeepsie, NY, US· patent location history
2007–2015Based in Lagrangeville, NY, US· patent location history
2012–2018Patents assigned to MOON BUM KI (7)· patent assignee history
2012–2015Patents assigned to CHAE MOOSUNG (5)· patent assignee history
2015–2019Patents assigned to INTEL CORP (9)· patent assignee history
2015–2018Based in Santa Clara, CA, US· patent location history
2016–2019Based in Gilroy, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INFINEON TECHNOLOGIES AG | 28 | 2003–2018 |
| INTEL CORP | 9 | 2015–2019 |
| MOON BUM KIself | 7 | 2012–2018 |
| TOSHIBA KK | 6 | 2003–2009 |
| CHAE MOOSUNG | 5 | 2012–2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Lagrangeville, New York, US | 12 | 2007–2015 |
| Tokyo, JP | 12 | 2003–2009 |
| Gilroy, California, US | 6 | 2016–2019 |
| Santa Clara, California, US | 3 | 2015–2018 |
| Poughkeepsie, New York, US | 3 | 2006–2009 |