Inventor
Satoru Shimura
Inventor
Nirasaki, JP
Overview
Patents· 19 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1040%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices26%
H01LSemiconductor devices12%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h107%
B05CApparatus for applying fluent materials to surfaces, in general5%
H10BElectronic memory devices5%
B08BCleaning in general2%
C23CCoating metallic material2%
G03BApparatus or arrangements for taking photographs or for projecting or viewing them2%
PatentTitleYear
10,998,183Substrate cleaning apparatus, substrate cleaning system, substrate cleaning method and memory medium202110,964,606Film forming system, film forming method, and computer storage medium202110,101,669Exposure apparatus, resist pattern forming method, and storage medium201810,025,190Substrate treatment system20189,741,559'Film forming method, computer storage medium, and film forming system'20179,341,952'Substrate treatment method, non-transitory computer storage medium and substrate treatment system'20169,329,483'Film forming method, non-transitory computer storage medium and film forming apparatus'20169,280,052'Substrate treatment method, non-transitory computer storage medium and substrate treatment system'20168,791,030'Coating treatment method and coating treatment apparatus'20148,283,253'Pattern forming method, semiconductor device manufacturing method and semiconductor device manufacturing apparatus'20128,273,661'Pattern forming method, semiconductor device manufacturing method and semiconductor device manufacturing apparatus'20128,202,682'Method of manufacturing semiconductor device, and resist coating and developing system'20128,075,730'Apparatus for manufacturing a semiconductor device'20118,037,890'Substrate cleaning device and substrate cleaning method'20117,781,342'Substrate treatment method for etching a base film using a resist pattern'20107,485,568'Method for forming wiring of semiconductor device'20097,401,988'Substrate processing apparatus and substrate processing method'20087,208,066'Substrate processing apparatus and substrate processing method'20076,485,203'Substrate processing method and substrate processing apparatus'2002Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2002–2021Patents assigned to TOKYO ELECTRON LTD (19)· patent assignee history
2002–2021Based in Nirasaki, JP· patent location history
2011–2012Patents assigned to SHIMURA SATORU (4)· patent assignee history
2011Patents assigned to ASAKO RYUICHI (1)· patent assignee history
2012Patents assigned to YAEGASHI HIDETAMI (2)· patent assignee history
2012Patents assigned to HAYAKAWA TAKASHI (1)· patent assignee history
2012Based in Yamanashi, JP· patent location history
2017–2021Based in Koshi, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TOKYO ELECTRON LTD | 19 | 2002–2021 |
| SHIMURA SATORUself | 4 | 2011–2012 |
| YAEGASHI HIDETAMI | 2 | 2012 |
| ASAKO RYUICHI | 1 | 2011 |
| HAYAKAWA TAKASHI | 1 | 2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| Nirasaki, JP | 13 | 2002–2021 |
| Koshi, JP | 4 | 2017–2021 |
| Yamanashi, JP | 2 | 2012 |