Inventor
Peter M. Barnes
Inventor
Mountain View, CA, US
Overview
Patents· 8 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H04Lprimary
H04LTransmission of digital information, e.g. telegraphic communication88%
G06FElectric digital data processing13%
PatentTitleYear
10,469,200Minimum latency link layer metaframing and error correction20199,887,806'Minimum latency link layer metaframing and error correction'20189,094,237'Packet routing and switching device'20158,270,401'Packet routing and switching device'20127,710,991'Scalable packet routing and switching device and method'20107,525,904'Redundant packet routing and switching device and method'20097,382,787'Packet routing and switching device'20086,301,642'Shared memory bus arbitration system to improve access speed when accessing the same address set'2001Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2001Based in Bradley Stoke, GB· patent location history
2008–2019Patents assigned to CISCO TECH INC (7)· patent assignee history
2008–2019Based in Mountain View, CA, US· patent location history
2012–2015Patents assigned to BARNES PETER M (2)· patent assignee history
2012–2015Patents assigned to JAYARAM NIKHIL (2)· patent assignee history
2012–2015Patents assigned to LI ANTHONY J (2)· patent assignee history
2012–2015Patents assigned to LYNCH WILLIAM L (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| CISCO TECH INC | 7 | 2008–2019 |
| BARNES PETER Mself | 2 | 2012–2015 |
| JAYARAM NIKHIL | 2 | 2012–2015 |
| LI ANTHONY J | 2 | 2012–2015 |
| LYNCH WILLIAM L | 2 | 2012–2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Mountain View, California, US | 7 | 2008–2019 |
| Bradley Stoke, GB | 1 | 2001 |