Inventor
Hiroyuki Miyazawa
Inventor
Kodaira, JP
Overview
Patents· 24 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Bprimary
H10BElectronic memory devices21%
H10DInorganic electric semiconductor devices16%
Y10TTechnical subjects covered by former us classification11%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests6%
C30BSingle-crystal growth5%
G02BOptical elements, systems or apparatus5%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h105%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h105%
C03BManufacture, shaping, or supplementary processes3%
C03CChemical composition of glasses, glazes or vitreous enamels3%
PatentTitleYear
10,994,968Elevator rope elongation measuring device20218,479,385'Method of producing wiring substrate'20136,991,150'Method of build up welding to thin-walled portion'20066,511,365'Lapping machine'20036,280,522'Quartz glass crucible for pulling silicon single crystal and production process for such crucible'20016,043,118'Semiconductor memory circuit device and method for fabricating a semiconductor memory device circuit'20005,968,259'High-purity quartz glass and method for the preparation thereof'19995,917,211'Semiconductor integrated circuit, method of fabricating the same and apparatus for fabricating the same'19995,877,027'Method for the analysis of impurity contents in silicon dioxide'19995,734,188'Semiconductor integrated circuit, method of fabricating the same and apparatus for fabricating the same'19985,651,827'Single-wafer heat-treatment apparatus and method of manufacturing reactor vessel used for same'19975,640,282'Base body of reflecting mirror and method for preparing the same'19975,631,182'Method of making a semiconductor memory circuit device'19975,617,262'Base body of reflecting mirror and method for preparing the same'19975,576,884'Base body of reflecting mirror and method for preparing the same'19965,389,558'Method of making a semiconductor memory circuit device'19955,268,587'Semiconductor integrated circuit device including a dielectric breakdown prevention circuit'19935,264,712'Semiconductor integrated circuit, method of fabricating the same and apparatus for fabricating the same'19935,237,187'Semiconductor memory circuit device and method for fabricating same'19935,081,515'Semiconductor integrated circuit device'19925,045,904'Semiconductor device including an improved trench arrangement'19914,962,052'Method for producing semiconductor integrated circuit device'19904,921,815'Method of producing a semiconductor memory device having trench capacitors'19904,612,565'Semiconductor memory device'1986Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1986–2000Patents assigned to HITACHI LTD (12)· patent assignee history
1990–2000Based in Kodaira, JP· patent location history
1991–2013Patents assigned to MIYAZAWA HIROYUKI (2)· patent assignee history
1991Patents assigned to ASAYAMA KYOICHIRO (1)· patent assignee history
1996–1997Patents assigned to SHIN ETSU QUARTZ CO LTD (3)· patent assignee history
1996–1999Based in Takefu, JP· patent location history
1997–2001Patents assigned to SHINETSU QUARTZ PROD (4)· patent assignee history
2006Based in Yokohama, JP· patent location history
2013Based in Nagano, JP· patent location history
2021Based in Sakura, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| HITACHI LTD | 12 | 1986–2000 |
| SHINETSU QUARTZ PROD | 4 | 1997–2001 |
| SHIN ETSU QUARTZ CO LTD | 3 | 1996–1997 |
| MIYAZAWA HIROYUKIself | 2 | 1991–2013 |
| ASAYAMA KYOICHIRO | 1 | 1991 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kodaira, JP | 12 | 1990–2000 |
| Takefu, JP | 6 | 1996–1999 |
| Sakura, JP | 1 | 2021 |
| Nagano, JP | 1 | 2013 |
| Yokohama, JP | 1 | 2006 |