Inventor
Ludwig Heitzer
Inventor
Regensburg, DE
Overview
Patents· 20 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1043%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1020%
H01LSemiconductor devices10%
H10DInorganic electric semiconductor devices5%
B81BMicrostructural devices or systems, e.g. micromechanical devices3%
B81CProcesses or apparatus specially adapted for the manufacture or treatment of microstructural devices or systems3%
G01LMeasuring force, stress, torque, work, mechanical power, mechanical efficiency, or fluid pressure3%
G01SRadio direction-finding3%
G02BOptical elements, systems or apparatus3%
H01MProcesses or means, e.g. batteries, for the direct conversion of chemical energy into electrical energy3%
PatentTitleYear
10,571,682Tilted chip assembly for optical devices202010,539,779Tilted chip assembly for optical devices202010,424,819Semiconductor battery and semiconductor device including a semiconductor battery201910,043,768Semiconductor device and method of manufacture thereof20189,881,909'Method for attaching a semiconductor die to a carrier'20189,576,935'Method for fabricating a semiconductor package and semiconductor package'20179,030,019'Semiconductor device and method of manufacture thereof'20158,421,226'Device including an encapsulated semiconductor chip and manufacturing method thereof'20138,330,260'Electronic component of VQFN design and method for producing the same'20128,173,488'Electronic device and method of manufacturing same'20127,919,857'Plastic housing and semiconductor component with said plastic housing'20117,834,460'Method for manufacturing an electronic component and corresponding electronic component'20107,749,864'Semiconductor device with a thinned semiconductor chip and method for producing the thinned semiconductor chip'20107,714,416'Electronic circuit in a package-in-package configuration and production method'20107,683,460'Module with a shielding and/or heat dissipating element'20107,662,664'Electronic circuit in a package-on-package configuration and method for producing the same'20107,592,236'Method for applying a structure of joining material to the back surfaces of semiconductor chips'20097,547,645'Method for coating a structure comprising semiconductor chips'20097,470,601'Semiconductor device with semiconductor chip and adhesive film and method for producing the same'20087,294,916'Semiconductor device with a thinned semiconductor chip and method for producing the thinned semiconductor chip'2007Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2007–2020Patents assigned to INFINEON TECHNOLOGIES AG (17)· patent assignee history
2007–2012Based in Regensburg, DE· patent location history
2012–2015Patents assigned to HEITZER LUDWIG (4)· patent assignee history
2012Patents assigned to BAUER MICHAEL (2)· patent assignee history
2012–2020Based in Falkenfels, DE· patent location history
2013–2015Patents assigned to MEYER THORSTEN (2)· patent assignee history
2018Based in Falkensfels, DE· patent location history
2019Patents assigned to INFINEON TECH DRESDEN GMBH & CO KG (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INFINEON TECHNOLOGIES AG | 17 | 2007–2020 |
| HEITZER LUDWIGself | 4 | 2012–2015 |
| BAUER MICHAEL | 2 | 2012 |
| MEYER THORSTEN | 2 | 2013–2015 |
| INFINEON TECH DRESDEN GMBH & CO KG | 1 | 2019 |
Locations
| Location | Patents | Span |
|---|---|---|
| Regensburg, DE | 11 | 2007–2012 |
| Falkenfels, DE | 8 | 2012–2020 |
| Falkensfels, DE | 1 | 2018 |