Inventor
Desi Rhoden
Inventor
Phoenix, AZ, US
Overview
Patents· 18 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing42%
G09GArrangements or circuits for control of indicating devices using static means to present variable information33%
G06TImage data processing or generation, in general8%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use8%
G11CStatic stores4%
H05KPrinted circuits4%
PatentTitleYear
9,535,454'Computing module with serial data connectivity'20178,291,140'Computing module with serial data connectivity'20128,060,675'Computing module with serial data connectivity'20117,734,852'Modular computer system'20107,657,678'Modular computer system'20106,782,466'Arrangement and method for accessing data in a virtual memory arrangement'20046,442,644'Memory system having synchronous-link DRAM (SLDRAM) devices and controller'20026,377,581'Optimized CPU-memory high bandwidth multibus structure simultaneously supporting design reusable blocks'20026,008,823'Method and apparatus for enhancing access to a shared memory'19995,951,689'Microprocessor power control system'19995,572,657'Methods and apparatus for graphics block movement in a multi-tasking windows system'19965,564,009'Methods and apparatus for burst data block movement in a multi-tasking windows system'19965,457,482'Method and apparatus for utilizing off-screen memory as a simultaneously displayable channel'19955,448,264'Method and apparatus for separate window clipping and display mode planes in a graphics frame buffer'19955,420,980'Methods and apparatus for graphics pipeline relative addressing in a multi-tasking windows system'19955,251,296'Methods and apparatus for generating arbitrarily addressed, arbitrarily shaped tiles in computer graphics systems'19935,233,689'Methods and apparatus for maximizing column address coherency for serial and random port accesses to a dual port RAM array'19935,224,210'Method and apparatus for graphics pipeline context switching in a multi-tasking windows system'1993Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1993–1996Patents assigned to HEWLETT PACKARD CO (8)· patent assignee history
1993–1996Based in Boulder, CO, US· patent location history
1999–2017Based in Phoenix, AZ, US· patent location history
2010–2012Patents assigned to DOSS JEFF (4)· patent assignee history
2010–2012Patents assigned to MOLLO CHARLES (4)· patent assignee history
2010–2012Patents assigned to RHODEN DESI (4)· patent assignee history
2010–2012Patents assigned to AHERN FRANK W (3)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| HEWLETT PACKARD CO | 8 | 1993–1996 |
| DOSS JEFF | 4 | 2010–2012 |
| MOLLO CHARLES | 4 | 2010–2012 |
| RHODEN DESIself | 4 | 2010–2012 |
| AHERN FRANK W | 3 | 2010–2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| Phoenix, AZ, US | 10 | 1999–2017 |
| Boulder, CO, US | 8 | 1993–1996 |