Inventor
ARNAUD CASTEX
Inventor
FR
Overview
Patents· 5 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices22%
H03HImpedance networks, e.g. resonant circuits17%
H10NElectric solid-state devices not otherwise provided for17%
Y10TTechnical subjects covered by former us classification17%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1011%
H10DInorganic electric semiconductor devices6%
PatentTitleYear
12,230,533Method for manufacturing a semiconductor-on-insulator substrate202512,101,080Heterostructure and method of fabrication202411,637,542Heterostructure and method of fabrication202311,626,319Semiconductor-on-insulator substrate for rf applications202311,595,020Heterostructure and method of fabrication2023Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2023–2025Patents assigned to SOITEC SILICON ON INSULATOR (5)· patent assignee history
2023–2025Based in FR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SOITEC SILICON ON INSULATOR | 5 | 2023–2025 |
Locations
| Location | Patents | Span |
|---|---|---|
| FR | 5 | 2023–2025 |