Inventor

Marcel Mitran

Inventor

Markham, CA

Overview

90→

Patents

2008–2021

Patent span

Physics

Primary field (CPC G)

Patents· 90 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing97%

Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use3%

PatentTitleYear

11,080,087Transaction begin/end instructions2021 11,010,066Identifying processor attributes based on detecting a guarded storage event2021 10,956,156Conditional transaction end instruction2021 10,901,736Conditional instruction end operation2021 10,831,476Compare and delay instructions2020 10,732,858Loading and storing controls regulating the operation of a guarded storage facility2020 10,725,685Load logical and shift guarded instruction2020 10,725,780Convert to zoned format from decimal floating point format2020 10,719,324Convert to zoned format from decimal floating point format2020 10,671,390Conditional instruction end operation2020 10,452,288Identifying processor attributes based on detecting a guarded storage event2019 10,437,602Program interruption filtering in transactional execution2019 10,430,199Program interruption filtering in transactional execution2019 10,360,033Conditional transaction end instruction2019 10,303,478Convert from zoned format to decimal floating point format2019 10,296,344Convert from zoned format to decimal floating point format2019 10,275,290Transactional lock elision with delayed lock checking2019 10,235,174Conditional instruction end operation2019 10,185,588Transaction begin/end instructions2019 10,169,038Compare and delay instructions2019 10,120,681Compare and delay instructions2018 10,025,589Conditional transaction end instruction2018 9,996,360Transaction abort instruction specifying a reason for abort2018 9,983,883Transaction abort instruction specifying a reason for abort2018 9,626,220'Computer system using partially functional processor core'2017 9,558,032'Conditional instruction end operation'2017 9,547,523'Conditional instruction end operation'2017 9,529,838'Transactional lock elision with delayed lock checking'2016 9,529,598'Transaction abort instruction'2016 9,507,574'Method, computer program product, and device for selectively allocating memory'2016 9,495,225'Parallel execution mechanism and operating method thereof'2016 9,483,269'Hardware based run-time instrumentation facility for managed run-times'2016 9,483,268'Hardware based run-time instrumentation facility for managed run-times'2016 9,477,514'Transaction begin/end instructions'2016 9,471,315'Run-time instrumentation reporting'2016 9,465,716'Run-time instrumentation directed sampling'2016 9,460,145'Transactional lock elision with delayed lock checking'2016 9,459,873'Run-time instrumentation monitoring of processor characteristics'2016 9,459,872'High-word facility for extending the number of general purpose registers available to instructions'2016 9,454,462'Run-time instrumentation monitoring for processor characteristic changes'2016 9,454,370'Conditional transaction end instruction'2016 9,436,477'Transaction abort instruction'2016 9,430,238'Run-time-instrumentation controls emit instruction'2016 9,424,035'Conditional transaction end instruction'2016 9,411,588'Conditional transaction end instruction'2016 9,395,989'Run-time-instrumentation controls emit instruction'2016 9,367,313'Run-time instrumentation directed sampling'2016 9,348,642'Transaction begin/end instructions'2016 9,335,995'Convert to zoned format from decimal floating point format'2016 9,335,994'Convert from zoned format to decimal floating point format'2016 9,335,993'Convert from zoned format to decimal floating point format'2016 9,329,861'Convert to zoned format from decimal floating point format'2016 9,280,346'Run-time instrumentation reporting'2016 9,280,448'Controlling operation of a run-time instrumentation facility from a lesser-privileged state'2016 9,268,543'Efficient code cache management in presence of infrequently used complied code fragments'2016 9,229,725'Safe conditional-load and conditional-store operations'2016 9,195,461'Run-time instrumentation reporting'2015 9,158,566'Page mapped spatially aware emulation of computer instruction set'2015 9,158,660'Controlling operation of a run-time instrumentation facility'2015 9,146,740'Branch prediction preloading'2015 9,146,739'Branch prediction preloading'2015 9,052,889'Load pair disjoint facility and instruction therefor'2015 9,052,945'Transaction begin/end instructions'2015 8,949,106'Just in time compiler in spatially aware emulation of a guest computer instruction set'2015 8,914,619'High-word facility for extending the number of general purpose registers available to instructions'2014 8,887,003'Transaction diagnostic block'2014 8,880,959'Transaction diagnostic block'2014 8,850,166'Load pair disjoint facility and instruction therefore'2014 8,819,647'Performance improvements for nested virtual machines'2014 8,776,033'Batch dispatch of java native interface calls'2014 8,768,683'Self initialized host cell spatially aware emulation of a computer instruction set'2014 8,689,172'Mining sequential patterns in weighted directed graphs'2014 8,683,423'Mining sequential patterns in weighted directed graphs'2014 8,639,492'Accelerated execution for emulated environments'2014 8,490,073'Controlling tracing within compiled code'2013 8,448,157'Eliminating redundant operations for common properties using shared real registers'2013 8,447,583'Self initialized host cell spatially aware emulation of a computer instruction set'2013 8,438,340'Executing atomic store disjoint instructions'2013 8,428,930'Page mapped spatially aware emulation of a computer instruction set'2013 8,387,031'Providing code improvements for nested virtual machines'2013 8,301,434'Host cell spatially aware emulation of a guest wild branch'2012 8,250,557'Configuring a dependency graph for dynamic by-pass instruction scheduling'2012 8,042,100'Methods, systems, and computer products for evaluating robustness of a list scheduling framework'2011 7,937,552'Cache line reservations'2011 7,930,686'Defining memory indifferent trace handles'2011 7,908,596'Automatic inspection of compiled code'2011 7,899,856'Hysteresis for mixed representation of Java BigDecimal objects'2011 7,770,161'Post-register allocation profile directed instruction scheduling'2010 7,617,493'Defining memory indifferent trace handles'2009 7,392,516'Method and system for configuring a dependency graph for dynamic by-pass instruction scheduling'2008

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2008–2021Patents assigned to IBM (87)· patent assignee history

2008–2015Based in Toronto, CA· patent location history

2009–2021Based in Markham, CA· patent location history

2012–2019Patents assigned to MITRAN MARCEL (27)· patent assignee history

2012–2016Patents assigned to COPELAND REID T (7)· patent assignee history

2014–2019Patents assigned to SLEGEL TIMOTHY J (11)· patent assignee history

2014–2016Based in Ontario, CA· patent location history

2015–2016Patents assigned to GAINEY JR CHARLES W (7)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
IBM	87	2008–2021
MITRAN MARCELself	27	2012–2019
SLEGEL TIMOTHY J	11	2014–2019
COPELAND REID T	7	2012–2016
GAINEY JR CHARLES W	7	2015–2016

Locations

Location	Patents	Span
Markham, CA	84	2009–2021
Ontario, CA	3	2014–2016
Toronto, CA	3	2008–2015