Inventor

William Wu Shen

Inventor
Hsinchu, TW

Overview

69→
Patents
1993–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 69 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing18%
H04LTransmission of digital information, e.g. telegraphic communication15%
H04BTransmission13%
G11CStatic stores9%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h107%
H01LSemiconductor devices5%
H05KPrinted circuits5%
G11BInformation storage based on relative movement between record carrier and transducer3%
H01QAntennas, i.e. radio aerials3%
H04WWireless communication networks3%
PatentTitleYear
11,095,333Systems and methods for die-to-die communication202111,075,116Integrated antenna on interposer substrate202110,871,805Hard disk drive tray202010,827,641Server apparatus with horizontal push-pull operating structure202010,785,888Air guide cover202010,692,763Integrated antenna on interposer substrate202010,673,603Integrated circuit with radio frequency interconnect202010,665,269Hard drive module and hard drive removable enclosure thereof202010,659,092Channel loss compensation circuits202010,554,255Communication system and method of data communications202010,470,330Server structure having detachable carrier201910,447,328Systems and methods for die-to-die communication201910,430,334Memory circuit and cache circuit configuration201910,342,156Server with airflow guiding structure201910,326,584Carrier synchronization device201910,317,949Server having removable storage structure201910,298,277Channel loss compensation circuits201910,291,272Communication system and method of data communications201910,284,307Radio frequency interconnect including calibration system and method of using201910,163,708Integrated antenna on interposer substrate201810,148,378PLL for carrier generator and method of generating carrier signals201810,090,883Radio frequency interconnect having a preamble generator201810,056,939Communication system and method of data communications201810,044,547Digital code recovery with preamble201810,009,167Carrier synchronization device201810,003,455Carrier generator, radio frequency interconnect including the carrier generator and method of using20189,991,917Demodulator, receiver and method of data communications20189,985,687Communication system and method of data communications20189,967,997Server equipment having fool-proof structure20189,887,863'Transceiver group and associated router'20189,847,320Semiconductor structure and method of fabricating the same20179,779,990'Integrated antenna on interposer substrate'20179,768,828'Communication system and method of data communications'20179,628,261'Carrier generator, radio frequency interconnect including the carrier generator and method of using'20179,613,174'Common template for electronic article'20179,608,695'Communication system'20179,559,733'Communication system and method of data communications'20179,543,993'Radio frequency interconnect'20179,431,064'Memory circuit and cache circuit configuration'20169,003,338'Common template for electronic article'20158,701,073'System and method for across-chip thermal and power management in stacked IC designs'20147,640,461'On-chip circuit for transition delay fault test pattern generation with launch off shift'20097,490,307'Automatic generating of timing constraints for the validation/signoff of test structures'20097,444,560'Test clocking scheme'20087,117,408'Method and system of testing data retention of memory'20067,061,821'Address wrap function for addressable memory devices'20067,028,248'Multi-cycle symbol level error correction and memory system'20066,941,414'High speed embedded DRAM with SRAM-like interface'20056,888,367'Method and apparatus for testing integrated circuit core modules'20056,674,684'Multi-bank chip compatible with a controller designed for a lesser number of banks and method of operating'20046,667,929'Power governor for dynamic RAM'20036,519,736'Generating special uncorrectable error codes for failure isolation'20036,480,982'Computer RAM memory system with enhanced scrubbing and sparing'20026,463,563'Single symbol correction double symbol detection code employing a modular H-matrix'20026,460,157'Method system and program products for error correction code conversion'20026,457,154'Detecting address faults in an ECC-protected memory'20026,386,456'Memory card identification system'20026,182,174'Memory card interface method using multiplexed storage protect key to indicate command acceptance'20016,163,857'Computer system UE recovery logic'20006,052,772'Memory request protocol method'20006,047,361'Memory control device, with a common synchronous interface coupled thereto, for accessing asynchronous memory devices and different synchronous devices'20005,768,294'Memory implemented error detection and correction code capable of detecting errors in fetching data from a wrong address'19985,761,221'Memory implemented error detection and correction code using memory modules'19985,751,745'Memory implemented error detection and correction code with address parity bits'19985,691,996'Memory implemented error detection and correction code with address parity bits'19975,581,071'Barcode scanner with adjustable light source intensity'19965,479,640'Memory access system including a memory controller with memory redrive circuitry'19955,274,646'Excessive error correction control'19935,267,242'Method and apparatus for substituting spare memory chip for malfunctioning memory chip with scrubbing'1993

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1993–2006Patents assigned to IBM (22)· patent assignee history
1993–2003Based in Poughkeepsie, NY, US· patent location history
2003–2006Based in Los Altos, CA, US· patent location history
2005–2009Patents assigned to LSI LOGIC CORP (3)· patent assignee history
2005–2020Based in San Jose, CA, US· patent location history
2008–2009Patents assigned to LSI CORP (2)· patent assignee history
2014–2021Based in Hsinchu, TW· patent location history
2016–2021Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (31)· patent assignee history
2017–2019Based in Hisnchu, TW· patent location history
2018–2020Patents assigned to SUPER MICRO COMPUTER INC (8)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TAIWAN SEMICONDUCTOR MFG CO LTD312016–2021
IBM221993–2006
SUPER MICRO COMPUTER INC82018–2020
LSI LOGIC CORP32005–2009
LSI CORP22008–2009
Locations
LocationPatentsSpan
Hsinchu, TW302014–2021
Poughkeepsie, New York, US181993–2003
San Jose, California, US132005–2020
Los Altos, California, US52003–2006
Hisnchu, TW32017–2019