Inventor
Matthew M. Gilbert
Inventor
Hillsboro, OR, US
Overview
Patents· 6 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing50%
H04LTransmission of digital information, e.g. telegraphic communication33%
H03MCoding17%
PatentTitleYear
10,841,139O-QPSK symbol timing estimation202010,298,265Low density parity check decoder20199,519,586'Methods and apparatus to reduce cache pollution caused by data prefetching'20167,213,137'Allocation of processor bandwidth between main program and interrupt service instruction based on interrupt priority and retiring micro-ops to cache'20076,771,595'Apparatus and method for dynamic resource allocation in a network environment'20046,662,297'Allocation of processor bandwidth by inserting interrupt servicing instructions to intervene main program in instruction queue mechanism'2003Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2003–2007Patents assigned to INTEL CORP (3)· patent assignee history
2003–2007Based in Hillsboro, OR, US· patent location history
2004Based in Beaverton, OR, US· patent location history
2016Patents assigned to QUALCOMM INC (1)· patent assignee history
2016Based in Raleigh, NC, US· patent location history
2019–2020Patents assigned to IMAGINATION TECH LTD (2)· patent assignee history
2019Based in Chepstow, GB· patent location history
2020Based in Bristol, GB· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 3 | 2003–2007 |
| IMAGINATION TECH LTD | 2 | 2019–2020 |
| QUALCOMM INC | 1 | 2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hillsboro, OR, US | 2 | 2003–2007 |
| Bristol, GB | 1 | 2020 |
| Chepstow, GB | 1 | 2019 |
| Raleigh, NC, US | 1 | 2016 |
| Beaverton, OR, US | 1 | 2004 |