Inventor

Yoshiaki Shimooka

Inventor
Kawasaki, JP

Overview

23→
Patents
2003–2017
Patent span
Electricity
Primary field (CPC H)

Patents· 23 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1034%
B81CProcesses or apparatus specially adapted for the manufacture or treatment of microstructural devices or systems16%
B81BMicrostructural devices or systems, e.g. micromechanical devices11%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%
G02BOptical elements, systems or apparatus5%
H01GCapacitors5%
H01LSemiconductor devices5%
Y10TTechnical subjects covered by former us classification5%
H01HElectric switches2%
H01PWaveguides2%
PatentTitleYear
9,676,608'Electrical device including a functional element in a cavity'20179,230,744'MEMS device and method of manufacturing the same'20169,202,654'MEMS device and manufacturing method thereof'20159,181,081'Electrical component and method of manufacturing the same'20158,987,829'Semiconductor device'20158,921,997'Electrical component and method of manufacturing the same'20148,921,951'MEMS device and manufacturing method thereof'20148,867,875'Semiconductor device using buried oxide layer as optical wave guides'20148,829,359'Electrical device including a functional element in a cavity'20148,309,858'Electrical device including a functional element in a cavity'20127,972,887'Micro-electro-mechanical-system package and method for manufacturing the same'20117,902,068'Manufacturing method of semiconductor device'20117,855,141'Semiconductor device having multiple wiring layers and method of producing the same'20107,786,589'Semiconductor device and method for manufacturing semiconductor device'20107,768,134'Interconnect structure and method for semiconductor device'20107,745,326'Semiconductor device having multiple wiring layers and method of producing the same'20107,589,014'Semiconductor device having multiple wiring layers and method of producing the same'20097,574,090'Semiconductor device using buried oxide layer as optical wave guides'20097,524,758'Interconnect structure and method for semiconductor device'20096,781,236'Semiconductor device using a multilayer wiring structure'20046,750,138'Semiconductor device of multi-wiring structure and method of manufacturing the same'20046,563,218'Semiconductor device of multi-wiring structure and method of manufacturing the same'20036,534,870'Apparatus and method for manufacturing a semiconductor device'2003

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2003–2017Patents assigned to TOSHIBA KK (20)· patent assignee history
2003–2010Based in Kawasaki, JP· patent location history
2009–2010Patents assigned to TOSHIBA AMERICA ELECTRONIC (3)· patent assignee history
2009–2016Based in Sagamihara, JP· patent location history
2009–2010Based in Danbury, CT, US· patent location history
2010–2015Based in Tokyo, JP· patent location history
2011–2017Based in Machida, JP· patent location history
2012–2016Patents assigned to SHIMOOKA YOSHIAKI (7)· patent assignee history
2012–2014Patents assigned to SUGIZAKI YOSHIAKI (3)· patent assignee history
2012–2014Patents assigned to KOJIMA AKIHIRO (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TOSHIBA KK202003–2017
SHIMOOKA YOSHIAKIself72012–2016
SUGIZAKI YOSHIAKI32012–2014
TOSHIBA AMERICA ELECTRONIC32009–2010
KOJIMA AKIHIRO22012–2014
Locations
LocationPatentsSpan
Kawasaki, JP72003–2010
Sagamihara, JP52009–2016
Machida, JP42011–2017
Tokyo, JP42010–2015
Danbury, CT, US22009–2010