Inventor
YU-TSE LAI
Inventor
TW
Overview
Patents· 7 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices30%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1030%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1017%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices13%
H10DInorganic electric semiconductor devices9%
PatentTitleYear
12,494,366Method of manufacturing semiconductor devices and semiconductor devices202512,476,145Self-aligned cut-metal layer method202512,476,150Critical dimension uniformity (CDU) control method and semiconductor substrate processing system202512,386,251Method and system to introduce bright field imaging at stitching area of high-NA EUV exposure202512,265,332Method of manufacturing a semiconductor device202512,224,237Method of manufacturing a via and a metal wiring for a semiconductor device202511,908,731Via-first self-aligned interconnect formation process2024Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2024–2025Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (7)· patent assignee history
2024–2025Based in TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 7 | 2024–2025 |
Locations
| Location | Patents | Span |
|---|---|---|
| TW | 7 | 2024–2025 |