Inventor
Thomas Hein
Inventor
Munich, DE
Overview
Patents· 66 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores38%
G06FElectric digital data processing18%
H03KPulse technique6%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use5%
H03MCoding4%
H04LTransmission of digital information, e.g. telegraphic communication4%
G01RMeasuring electric variables3%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses3%
G05FSystems for regulating electric or magnetic variables3%
B41FPrinting machines or presses1%
PatentTitleYear
11,119,700Receive-side crosstalk cancelation202111,113,212Multi-level receiver with termination-off mode202111,086,803Dynamically configuring transmission lines of a bus202111,086,733Reporting control information errors202110,998,011Drive strength calibration for multi-level signaling202110,997,095Training procedure for receivers associated with a memory device202110,860,417Multiple memory die techniques202010,840,971Pre-distortion for multi-level signaling202010,619,535Arrangement for removing blow-by gases from a crankcase of an internal combustion engine20209,142,269'Data mask encoding in data bit inversion scheme'20158,914,589'Multi-port DRAM architecture for accessing different memory partitions'20148,909,998'Phase shift adjusting method and circuit'20148,874,261'Method and system for controlling a mobile robot'20148,706,958'Data mask encoding in data bit inversion scheme'20148,674,999'Circuit'20148,495,310'Method and system including plural memory controllers and a memory access control bus for accessing a memory device'20138,392,779'Interface voltage adjustment based on error detection'20138,305,834'Semiconductor memory with memory cell portions having different access speeds'20128,207,976'Circuit'20128,201,071'Information transmission and reception'20128,026,959'Integrated circuit for receiving data'20117,844,888'Electronic device, method for operating an electronic device, memory circuit and method of operating a memory circuit'20107,836,386'Phase shift adjusting method and circuit'20107,835,197'Integrated semiconductor memory with generation of data'20107,826,969'Determining position of a vehicle with reference to a landmark'20107,802,166'Memory controller, memory circuit and memory system with a memory controller and a memory circuit'20107,757,064'Method and apparatus for sending data from a memory'20107,746,724'Asynchronous data transmission'20107,587,655'Method of transferring signals between a memory device and a memory controller'20097,587,571'Evaluation unit in an integrated circuit'20097,564,735'Memory device, and method for operating a memory device'20097,515,456'Memory circuit, a dynamic random access memory, a system comprising a memory and a floating point unit and a method for storing digital data'20097,439,761'Apparatus and method for controlling a driver strength'20087,428,689'Data memory system and method for transferring data into a data memory'20087,411,862'Control signal training'20087,404,018'Read latency control circuit'20087,363,561'Method and circuit arrangement for resetting an integrated circuit'20087,355,921'Device in a memory circuit for definition of waiting times'20087,224,625'Method and circuit arrangement for controlling write access to a semiconductor memory'20077,221,292'Circuit for producing a data bit inversion flag'20077,215,263'Parallel-serial converter'20077,156,463'Motor vehicle seat'20077,016,452'Delay locked loop'20066,946,848'Calibration configuration'20056,928,025'Synchronous integrated memory'20056,882,554'Integrated memory, and a method of operating an integrated memory'20056,784,650'Circuit configuration for generating a controllable output voltage'20046,737,901'Integrable, controllable delay device, delay device in a control loop, and method for delaying a clock signal using a delay device'20046,670,802'Integrated circuit having a test operating mode and method for testing a multiplicity of such circuits'20036,661,265'Delay locked loop for generating complementary clock signals'20036,657,422'Current mirror circuit'20036,584,021'Semiconductor memory having a delay locked loop'20036,542,389'Voltage pump with switch-on control'20036,532,188'Integrated memory having a row access controller for activating and deactivating row lines'20036,480,024'Circuit configuration for programming a delay in a signal path'20026,401,224'Integrated circuit and method for testing it'20026,388,944'Memory component with short access time'20026,366,527'Circuit configuration for generating an output clock signal with optimized signal generation time'20026,351,167'Integrated circuit with a phase locked loop'20026,285,228'Integrated circuit for generating a phase-shifted output clock signal from a clock signal'20016,285,176'Voltage generator with superimposed reference voltage and deactivation signals'20016,259,652'Synchronous integrated memory'20016,188,642'Integrated memory having column decoder for addressing corresponding bit line'20016,144,590'Semiconductor memory having differential bit lines'20006,101,141'Integrated memory'20006,028,815'Integrated memory'2000Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2000–2002Patents assigned to SIEMENS AG (5)· patent assignee history
2000–2021Based in Munich, DE· patent location history
2001–2014Patents assigned to INFINEON TECHNOLOGIES AG (31)· patent assignee history
2002–2004Based in Mnchen, DE· patent location history
2005–2014Based in München, DE· patent location history
2008–2014Patents assigned to QIMONDA AG (15)· patent assignee history
2010–2014Based in Moline, IL, US· patent location history
2012–2014Patents assigned to HEIN THOMAS (9)· patent assignee history
2020–2021Patents assigned to MICRON TECHNOLOGY INC (8)· patent assignee history
2020Based in Quedlinburg, DE· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INFINEON TECHNOLOGIES AG | 31 | 2001–2014 |
| QIMONDA AG | 15 | 2008–2014 |
| HEIN THOMASself | 9 | 2012–2014 |
| MICRON TECHNOLOGY INC | 8 | 2020–2021 |
| SIEMENS AG | 5 | 2000–2002 |
Locations
| Location | Patents | Span |
|---|---|---|
| Munich, DE | 34 | 2000–2021 |
| München, DE | 15 | 2005–2014 |
| Mnchen, DE | 13 | 2002–2004 |
| Moline, Illinois, US | 2 | 2010–2014 |
| Quedlinburg, DE | 1 | 2020 |