Inventor

Dinesh K. Jain

Inventor

Austin, TX, US

Overview

2000–2017

Patent span

Physics

Primary field (CPC G)

Patents· 37 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing46%

G11CStatic stores39%

Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications7%

H01HElectric switches3%

G01RMeasuring electric variables1%

G05BControl or regulating systems in general1%

H03MCoding1%

PatentTitleYear

9,740,622'Extended fuse reprogrammability mechanism'2017 9,727,478'Apparatus and method for configurable redundant fuse banks'2017 9,727,477'Core-specific fuse mechanism for a multi-core die'2017 9,715,457'Multi-core fuse decompression mechanism'2017 9,715,456'Apparatus and method for storage and decompression of configuration data'2017 9,710,390'Apparatus and method for extended cache correction'2017 9,690,511'Multi-core data array power gating restoral mechanism'2017 9,665,490'Apparatus and method for repairing cache arrays in a multi-core microprocessor'2017 9,606,933'Multi-core apparatus and method for restoring data arrays following a power gating event'2017 9,594,691'Multi-core programming apparatus and method for restoring data arrays following a power gating event'2017 9,594,690'Multi-core microprocessor power gating cache restoral programming mechanism'2017 9,582,428'Multi-core programming apparatus and method for restoring data arrays following a power gating event'2017 9,582,429'Multi-core data array power gating cache restoral programming mechanism'2017 9,535,847'Apparatus and method for compression of configuration data'2017 9,524,241'Multi-core microprocessor power gating cache restoral mechanism'2016 9,477,608'Apparatus and method for rapid fuse bank access in a multi-core processor'2016 9,471,502'Multi-core microprocessor configuration data compression and decompression system'2016 9,396,123'Core-specific fuse mechanism for a multi-core die'2016 9,396,124'Apparatus and method for configurable redundant fuse banks'2016 9,395,802'Multi-core data array power gating restoral mechanism'2016 9,390,022'Apparatus and method for extended cache correction'2016 9,384,140'Apparatus and method for storage and decompression of configuration data'2016 9,384,141'Multi-core fuse decompression mechanism'2016 9,378,147'Extended fuse reprogrammability mechanism'2016 9,348,690'Correctable configuration data compression and decompression system'2016 9,223,715'Microprocessor mechanism for decompression of cache correction data'2015 8,982,655'Apparatus and method for compression and decompression of microprocessor configuration data'2015 8,879,345'Microprocessor mechanism for decompression of fuse correction data'2014 8,429,471'Microprocessor apparatus and method for securing a programmable fuse array'2013 8,341,472'Apparatus and method for tamper protection of a microprocessor fuse array'2012 8,281,222'Detection and correction of fuse re-growth in a microprocessor'2012 8,242,800'Apparatus and method for override access to a secured programmable fuse array'2012 7,663,957'Microprocessor with program-accessible re-writable non-volatile state embodied in blowable fuses of the microprocessor'2010 6,609,191'Method and apparatus for speculative microinstruction pairing'2003 6,526,502'Apparatus and method for speculatively updating global branch history with branch prediction prior to resolution of branch outcome'2003 6,189,091'Apparatus and method for speculatively updating global history and restoring same on branch misprediction detection'2001 6,061,781'Concurrent execution of divide microinstructions in floating point unit and overflow detection microinstructions in integer unit for integer divide'2000

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2000–2003Patents assigned to IP FIRST LLC (4)· patent assignee history

2000–2017Based in Austin, TX, US· patent location history

2010–2016Patents assigned to VIA TECH INC (10)· patent assignee history

2012–2013Patents assigned to HENRY G GLENN (4)· patent assignee history

2012–2013Patents assigned to JAIN DINESH K (4)· patent assignee history

2015–2017Patents assigned to VIA ALLIANCE SEMICONDUCTOR CO LTD (26)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
VIA ALLIANCE SEMICONDUCTOR CO LTD	26	2015–2017
VIA TECH INC	10	2010–2016
HENRY G GLENN	4	2012–2013
IP FIRST LLC	4	2000–2003
JAIN DINESH Kself	4	2012–2013

Locations

Location	Patents	Span
Austin, Texas, US	37	2000–2017