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Inventor

Hsiao-Hui Chen

Inventor
Hsinchu, TW

Overview

17→
Patents
2001–2021
Patent span
Physics
Primary field (CPC G)

Patents· 17 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing29%
G11CStatic stores16%
H10DInorganic electric semiconductor devices16%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices5%
H01LSemiconductor devices5%
Y02PClimate change mitigation technologies in the production or processing of goods5%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests5%
A63BApparatus for physical training, gymnastics, swimming, climbing, or fencing3%
G01LMeasuring force, stress, torque, work, mechanical power, mechanical efficiency, or fluid pressure3%
G02BOptical elements, systems or apparatus3%
PatentTitleYear
10,996,119Film pressure sensing device and pressure sensing system for exercise equipment202110,108,376Memory initialization20189,659,920'Performance-driven and gradient-aware dummy insertion for gradient-sensitive array'20179,018,980'Bimodal clock generator'20158,978,000'Performance-driven and gradient-aware dummy insertion for gradient-sensitive array'20158,875,076'System and methods for converting planar design to FinFET design'20148,789,004'Automatic flow of megacell generation'20148,726,220'System and methods for converting planar design to FinFET design'20148,621,406'System and methods for converting planar design to FinFET design'20138,295,099'Dual port memory with write assist'20128,116,119'Desensitizing static random access memory (SRAM) to process variations'20127,746,717'Desensitizing static random access memory (SRAM) to process variation'20107,464,140'Method and system for dynamically determining web resource to be loaded and saving space'20087,309,628'Method of forming a semiconductor device'20076,888,754'Nonvolatile semiconductor memory array with byte-program, byte-erase, and byte-read capabilities'20056,862,722'Extendable method for revising patterned microelectronic conductor layer layouts'20056,256,232'Data access method capable of reducing the number of erasing to flash memory and data patch and access device using the same'2001

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2001–2021Based in Taipei, TW· patent location history
2005–2014Patents assigned to TAIWAN SEMICONDUCTOR MFG (6)· patent assignee history
2005–2017Based in Hsinchu, TW· patent location history
2007–2014Patents assigned to CHEN HSIAO-HUI (4)· patent assignee history
2010–2018Patents assigned to XILINX INC (5)· patent assignee history
2012–2015Based in Campbell, CA, US· patent location history
2012Based in Milpitas, CA, US· patent location history
2013–2014Patents assigned to LEI CHEOK-KEI (3)· patent assignee history
2013–2014Patents assigned to CHANG CHIH-SHENG (2)· patent assignee history
2018Based in Los Altos, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TAIWAN SEMICONDUCTOR MFG62005–2014
XILINX INC52010–2018
CHEN HSIAO-HUIself42007–2014
LEI CHEOK-KEI32013–2014
CHANG CHIH-SHENG22013–2014
Locations
LocationPatentsSpan
Hsinchu, TW82005–2017
Taipei, TW32001–2021
Campbell, California, US22012–2015
Los Altos, California, US12018
Milpitas, California, US12012