Inventor

Kazunori Kanebako

Inventor
Yokohama, JP

Overview

20→
Patents
1992–2017
Patent span
Physics
Primary field (CPC G)

Patents· 20 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores50%
H10BElectronic memory devices25%
G06FElectric digital data processing11%
H10DInorganic electric semiconductor devices11%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h104%
PatentTitleYear
9,665,426'Semiconductor device and reading method'20178,687,420'Nonvolatile semiconductor memory device'20148,406,054'Semiconductor memory device with improved ECC efficiency'20138,379,445'Semiconductor storage device capable of reducing erasure time'20138,379,444'Semiconductor memory device capable of accurate reading even when erasure level changes'20138,270,214'Nonvolatile semiconductor memory device'20128,116,134'Semiconductor memory device with improved ECC efficiency'20127,813,171'Semiconductor memory device'20107,414,894'Methods for identifying non-volatile memory elements with poor subthreshold slope or weak transconductance'20087,349,249'Semiconductor memory device'20087,317,636'Nonvolatile semiconductor memory, a data write-in method for the nonvolatile semiconductor memory and a memory card'20087,046,555'Methods for identifying non-volatile memory elements with poor subthreshold slope or weak transconductance'20065,556,800'Method of manufacturing a mask read only memory (ROM) for storing multi-value data'19965,386,381'Mask read only memory (ROM) for storing multi-value data'19955,374,847'Nonvolatile semiconductor memory device having a passivation film'19945,364,805'Method of manufacturing an EEPROM having an erasing gate electrode'19945,278,078'Method of manufacturing semiconductor device'19945,252,846'Semiconductor memory device with an improved erroneous write characteristic and erasure characteristic'19935,169,797'Manufacturing method for semiconductor storage device'19925,094,971'Method of manufacturing a read only semiconductor memory device'1992

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1992–2017Patents assigned to TOSHIBA KK (20)· patent assignee history
1992–2013Based in Yokohama, JP· patent location history
1993Based in Tokyo, JP· patent location history
2008Patents assigned to SANDISK CORP (1)· patent assignee history
2012–2014Patents assigned to KANEBAKO KAZUNORI (6)· patent assignee history
2012–2014Patents assigned to SHIBATA NOBORU (6)· patent assignee history
2012–2017Based in Kanagawa, JP· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TOSHIBA KK201992–2017
KANEBAKO KAZUNORIself62012–2014
SHIBATA NOBORU62012–2014
SANDISK CORP12008
Locations
LocationPatentsSpan
Yokohama, JP161992–2013
Kanagawa, JP32012–2017
Tokyo, JP11993