Inventor
Seung-Jin Seo
Inventor
Suwon-si, KR
Overview
Patents· 18 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores42%
D21HPulp compositions9%
G06FElectric digital data processing9%
H04NPictorial communication, e.g. television6%
B01DSeparation3%
C02FTreatment of water, waste water, sewage, or sludge3%
E01FAdditional work, such as equipping roads or the construction of platforms, helicopter landing stages, signs, snow fences, or the like3%
E03FSewers3%
G02BOptical elements, systems or apparatus3%
G03BApparatus or arrangements for taking photographs or for projecting or viewing them3%
PatentTitleYear
11,042,076Camera module with heating element20219,320,147'Semiconductor module assembly'20168,576,637'Memory module including memory buffer and memory system having the same'20138,462,534'Memory module cutting off DM pad leakage current'20138,261,301'Broadcast receiver and method for managing reserved recording information'20128,159,853'Memory module cutting off DM pad leakage current'20128,051,343'Method of testing a memory module and hub of the memory module'20117,965,530'Memory modules and memory systems having the same'20117,930,465'Determining operation mode for semiconductor memory device'20117,849,373'Method of testing a memory module and hub of the memory module'20107,606,110'Memory module, memory unit, and hub with non-periodic clock and methods of using the same'20097,539,910'Memory module test system for memory module including hub'20097,519,873'Methods and apparatus for interfacing between test system and memory'20097,487,413'Memory module testing apparatus and method of testing memory modules'20097,447,954'Method of testing a memory module and hub of the memory module'20087,319,635'Memory system with registered memory module and control method'20086,754,112'Integrated circuit devices having delay circuits for controlling setup/delay times of data signals that are provided to memory devices'20045,768,173'Memory modules, circuit substrates and methods of fabrication therefor using partially defective memory devices'1998Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1998–2016Patents assigned to SAMSUNG ELECTRONICS CO LTD (15)· patent assignee history
1998–2004Based in Kyungki-do, KR· patent location history
2008–2021Based in Suwon-si, KR· patent location history
2011Based in Gyeonggi-do, KR· patent location history
2012–2013Patents assigned to HAN YOU-KEUN (3)· patent assignee history
2012–2013Patents assigned to KIM SEOK-IL (3)· patent assignee history
2012–2013Patents assigned to SEO SEUNG-JIN (3)· patent assignee history
2012Based in Seoul, KR· patent location history
2013Patents assigned to JANG SOON-DEOK (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SAMSUNG ELECTRONICS CO LTD | 15 | 1998–2016 |
| HAN YOU-KEUN | 3 | 2012–2013 |
| KIM SEOK-IL | 3 | 2012–2013 |
| SEO SEUNG-JINself | 3 | 2012–2013 |
| JANG SOON-DEOK | 1 | 2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Suwon-si, KR | 13 | 2008–2021 |
| Gyeonggi-do, KR | 2 | 2011 |
| Kyungki-do, KR | 2 | 1998–2004 |
| Seoul, KR | 1 | 2012 |