Inventor
Chen-Hua Yu
Inventor
Hsinchu, TW
Overview
Patents· 54 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices31%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1029%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1016%
H10DInorganic electric semiconductor devices5%
G01NInvestigating or analysing materials by determining their chemical or physical properties3%
A61PSpecific therapeutic activity of chemical compounds or medicinal preparations2%
C07DHeterocyclic compounds2%
A61KPreparations for medical, dental or toiletry purposes1%
C11DDetergent compositions1%
H05KPrinted circuits1%
PatentTitleYear
11,133,236Polymer-based-semiconductor structure with cavity202111,133,274Fan-out interconnect structure and method for forming same202111,133,283Integrated fan-out device202111,133,258Package with bridge die for interconnection and method forming same202111,133,387FinFETs having dielectric punch-through stoppers202111,133,282COWOS structures and methods forming same202111,121,299Semiconductor device and method202111,121,070Integrated fan-out package202111,121,052Integrated fan-out device, 3D-IC system, and method202111,114,563Semiconductor devices with low junction capacitances and methods of fabrication thereof202111,107,771Segregated power and ground design for yield improvement202111,107,798Semiconductor packages and methods of forming the same202111,107,747Semiconductor package with composite thermal interface material structure and method of forming the same202111,101,140Semiconductor device and method of manufacture202111,101,195Package structure and method for forming the same202111,101,240Isolation bonding film for semiconductor packages and methods of forming the same202111,101,260Method of forming a dummy die of an integrated circuit having an embedded annular structure202111,094,641Fan-out package having a main die and a dummy die202111,094,634Semiconductor package structure comprising rigid-flexible substrate and manufacturing method thereof202111,094,680Packages and methods of forming packages202111,094,671Package with thinned substrate202111,088,131Semiconductor device that uses bonding layer to join semiconductor substrates together202111,088,110Semiconductor device, circuit board structure and manufacturing method thereof202111,088,125IPD modules with flexible connection scheme in packaging202111,081,372Package system for integrated circuits202111,075,145Semiconductor device including through die via and manufacturing method thereof202111,075,168InFO-POP structures with TIVs having cavities202111,075,176Semiconductor device and method202111,075,184Semiconductor package and method of fabricating semiconductor package202111,069,636Package structure and method of forming the same202111,069,671Semiconductor package and method202111,066,297MEMS packages and methods of manufacture thereof202111,069,658System on integrated chips and methods of forming same202111,069,652Method of manufacturing semiconductor structure202111,069,573Wafer level package structure and method of forming same202111,062,998Semiconductor package and manufacturing method thereof202111,063,016Integrated fan-out package including voltage regulators and methods forming same202111,062,987Semiconductor device202111,063,008Semiconductor structure and manufacturing method thereof202111,062,975Package structures202111,062,915Redistribution structures for semiconductor packages and methods of forming the same202111,056,474Semiconductor package, semiconductor device and method of forming the same202111,056,459Chip package structure and method for forming the same202111,056,464Packages with metal line crack prevention design202111,056,436Integrated fan-out structure with rugged interconnect202111,056,433Redistribution layer structures for integrated circuit package20218,026,275'Compositions, methods of use and preparation of 2,6-diisopropyl phenol and analogs for ischemic injury'20117,700,612'Di-ester prodrugs of camptothecin, process for their preparation and their therapeutical applications'20107,674,816'Substituted melatonin derivatives, process for their preparation, and methods of use'20107,586,008'Propofol analogs, process for their preparation, and methods of use'2009RE040835'Enhancement of immunochemical staining in aldehyde-fixed tissue'20097,070,951'Dewaxing kit for immunostaining tissue specimens'20066,632,598'Deparaffinization compositions and methods for their use'20035,578,452'Enhancement of immunochemical staining in aldehyde-fixed tissues'1996Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1996–2006Patents assigned to BIOGENEX LAB (3)· patent assignee history
1996–2009Based in Pleasant Hill, CA, US· patent location history
2009Patents assigned to ABRAXIS BIOSCIENCE INC (1)· patent assignee history
2009Patents assigned to BIOGENX LAB INC (1)· patent assignee history
2009–2011Based in San Diego, CA, US· patent location history
2010–2011Patents assigned to ABRAXIS BIOSCIENCE LLC (3)· patent assignee history
2021Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (46)· patent assignee history
2021Based in Hsinchu, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 46 | 2021 |
| ABRAXIS BIOSCIENCE LLC | 3 | 2010–2011 |
| BIOGENEX LAB | 3 | 1996–2006 |
| ABRAXIS BIOSCIENCE INC | 1 | 2009 |
| BIOGENX LAB INC | 1 | 2009 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hsinchu, TW | 46 | 2021 |
| San Diego, California, US | 4 | 2009–2011 |
| Pleasant Hill, California, US | 4 | 1996–2009 |