Inventor
Hong-Ji Lee
Inventor
Hsinchu, TW
Overview
Patents· 36 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1022%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1017%
H01LSemiconductor devices16%
H10DInorganic electric semiconductor devices15%
H10BElectronic memory devices9%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices3%
C09BOrganic dyes or closely-related compounds for producing dyes, e.g. pigments2%
G01NInvestigating or analysing materials by determining their chemical or physical properties2%
G11BInformation storage based on relative movement between record carrier and transducer2%
H01JElectric discharge tubes or discharge lamps2%
PatentTitleYear
10,424,593Three-dimensional non-volatile memory and manufacturing method thereof201910,204,859Interconnect structure and fabricating method thereof20199,922,876'Interconnect structure and fabricating method thereof'20189,881,809'Semiconductor device and method of fabricating the same'20189,627,247'Semiconductor device and method of fabricating the same'20179,449,915'Semiconductor device and method of manufacturing the same'20169,425,086'Method of controlling contact hole profile for metal fill-in'20169,337,036'Method of forming copper sulfide film for reducing copper oxidization and loss'20169,305,840'Cluster system for eliminating barrier overhang'20169,299,667'Method of shaping densely arranged PL gates and peripheral MOS gates for ILD oxide fill-in'20169,287,285'Self-aligned liner method of avoiding PL gate damage'20169,269,660'Multilayer connection structure'20169,224,803'Formation of a high aspect ratio contact hole'20159,012,282'Self-aligned liner method of avoiding PL gate damage'20158,697,340'Semiconductor structure and method of fabricating the same'20148,445,346'Method of reducing wordline shorting'20138,383,512'Method for making multilayer connection structure'20138,372,714'Semiconductor device and method of manufacturing a semiconductor device'20138,304,175'Patterning method'20128,076,778'Method for preventing Al-Cu bottom damage using TiN liner'20117,842,981'Semiconductor device and method of manufacturing the same'20107,629,583'Method and apparatus for analyzing a photoresist film'20097,550,390'Method and apparatus for dielectric etching during integrated circuit fabrication'20097,494,761'Cyclodextrin derivative, photoresist composition including the cyclodextrin derivative and method of forming a pattern using the photoresist composition'20097,435,681'Methods of etching stacks having metal layers and hard mask layers'20087,427,519'Method of detecting end point of plasma etching process'20087,410,593'Plasma etching methods using nitrogen memory species for sustaining glow discharge'20086,589,706'Preparation of cyanine dye for high density optical recording disk'20036,462,483'Induction plasma processing chamber'20026,451,161'Method and apparatus for generating high-density uniform plasma'20026,398,430'Semiconductor device fabrication system'20026,358,672'Method of forming semiconductor device pattern including cross-linking and flow baking a positive photoresist'20026,319,858'Methods for reducing a dielectric constant of a dielectric film and for forming a low dielectric constant porous film'20015,958,087'Preparation of cyanine dye for high density optical recording disk'19995,900,348'Cyanine dyes mixture as optical recording media'19995,698,644'Process for preparing syndiotactic vinyl aromatic polymers under high pressure inert gas'1997Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1997–2019Based in Hsinchu, TW· patent location history
1999–2003Patents assigned to IND TECH RES INST (3)· patent assignee history
1999–2016Based in Taoyuan County, TW· patent location history
2001–2002Patents assigned to NANO ARCHITECT RES CORP (3)· patent assignee history
2002–2010Patents assigned to SAMSUNG ELECTRONICS CO LTD (5)· patent assignee history
2002Based in Seoul, KR· patent location history
2008–2019Patents assigned to MACRONIX INT CO LTD (24)· patent assignee history
2010Based in Incheon, KR· patent location history
2011–2014Patents assigned to LEE HONG-JI (6)· patent assignee history
2011–2019Based in Taoyuan, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MACRONIX INT CO LTD | 24 | 2008–2019 |
| LEE HONG-JIself | 6 | 2011–2014 |
| SAMSUNG ELECTRONICS CO LTD | 5 | 2002–2010 |
| IND TECH RES INST | 3 | 1999–2003 |
| NANO ARCHITECT RES CORP | 3 | 2001–2002 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hsinchu, TW | 14 | 1997–2019 |
| Taoyuan County, TW | 11 | 1999–2016 |
| Taoyuan, TW | 5 | 2011–2019 |
| Seoul, KR | 2 | 2002 |
| Incheon, KR | 1 | 2010 |