Inventor
Du-Heon Song
Inventor
Gyeonggi-do, KR
Overview
Patents· 26 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices37%
H10BElectronic memory devices26%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1015%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%
A47GHousehold or table equipment4%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests4%
G11CStatic stores2%
H01LSemiconductor devices2%
PatentTitleYear
10,529,736Semiconductor device20208,765,572'Method of fabricating semiconductor device'20147,696,570'Transistors of semiconductor device having channel region in a channel-portion hole and methods of forming the same'20107,534,708'Recessed-type field effect transistor with reduced body effect'20097,524,733'Asymmetric source/drain transistor employing selective epitaxial growth (SEG) layer and method of fabricating same'20097,491,603'Transistors of semiconductor device having channel region in a channel-portion hole and methods of forming the same'20097,429,505'Method of fabricating fin field effect transistor using isotropic etching technique'20087,402,871'Semiconductor device having resistor and method of fabricating the same'20087,393,769'Transistor of a semiconductor device having a punchthrough protection layer and methods of forming the same'20087,378,320'Method of forming asymmetric MOS transistor with a channel stopping region and a trench-type gate'20087,354,827'Transistor having asymmetric channel region, semiconductor device including the same, and method of fabricating semiconductor device including the same'20087,323,746'Recess gate-type semiconductor device and method of manufacturing the same'20087,300,845'Method of manufacturing recess type MOS transistor having a dual diode impurity layer structure'20077,279,774'Bulk substrates in FinFETs with trench insulation surrounding FIN pairs having FINs separated by recess hole shallower than trench'20077,221,023'Asymmetric source/drain transistor employing selective epitaxial growth (SEG) layer and method of fabricating same'20077,205,208'Method of manufacturing a semiconductor device'20077,153,733'Method of fabricating fin field effect transistor using isotropic etching technique'20067,034,368'Semiconductor memory device and fabrication method thereof using damascene gate and epitaxial growth'20066,861,313'Semiconductor memory device and fabrication method thereof using damascene bitline process'20056,844,233'Semiconductor memory device and fabrication method thereof using damascene gate and epitaxial growth'20056,191,049'Method for forming oxide film in semiconductor device'20016,090,692'Fabrication method for semiconductor memory device'20005,942,450'Method of fabricating semiconductor device'19995,895,258'Semiconductor device fabrication method'19995,849,626'Method for forming isolation region of semiconductor device'19985,686,331'Fabrication method for semiconductor device'1997Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1997–2000Patents assigned to LG SEMICON CO LTD (5)· patent assignee history
1997–2010Based in Kyungki-do, KR· patent location history
2005–2020Patents assigned to SAMSUNG ELECTRONICS CO LTD (20)· patent assignee history
2005–2006Based in Gyeonggi, KR· patent location history
2006–2009Based in Gyeonggi-do, KR· patent location history
2008–2009Based in Yongin-si, KR· patent location history
2014Patents assigned to CHO CHANG-HYUN (1)· patent assignee history
2014Patents assigned to CHOI JUNG-DAL (1)· patent assignee history
2014Patents assigned to CHOI YONG-LACK (1)· patent assignee history
2020Based in Seoul, KR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SAMSUNG ELECTRONICS CO LTD | 20 | 2005–2020 |
| LG SEMICON CO LTD | 5 | 1997–2000 |
| CHO CHANG-HYUN | 1 | 2014 |
| CHOI JUNG-DAL | 1 | 2014 |
| CHOI YONG-LACK | 1 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Gyeonggi-do, KR | 10 | 2006–2009 |
| Kyungki-do, KR | 7 | 1997–2010 |
| Yongin-si, KR | 3 | 2008–2009 |
| Gyeonggi, KR | 3 | 2005–2006 |
| Seoul, KR | 1 | 2020 |