Inventor
Zhenyu Hu
Inventor
Clifton Park, NY, US
Overview
Patents· 39 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices30%
H10DInorganic electric semiconductor devices30%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1016%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1014%
H01RElectrically-conductive connections5%
B82YSpecific uses or applications of nanostructures2%
G06QInformation and communication technology [ict] specially adapted for administrative, commercial, financial, managerial or supervisory purposes1%
H02GInstallation of electric cables or lines, or of combined optical and electric cables or lines1%
H05KPrinted circuits1%
H10BElectronic memory devices1%
PatentTitleYear
10,833,067Metal resistor structure in at least one cavity in dielectric over TS contact and gate structure202010,825,897Formation of enhanced faceted raised source/drain EPI material for transistor devices202010,777,642Formation of enhanced faceted raised source/drain epi material for transistor devices202010,707,303Method, apparatus, and system for improving scaling of isolation structures for gate, source, and/or drain contacts202010,692,039Cargo logistics dispatch service with integrated pricing and scheduling202010,643,900Method to reduce FinFET short channel gate height202010,559,656Wrap-all-around contact for nanosheet-FET and method of forming same202010,475,890Scaled memory structures or other logic devices with middle of the line cuts201910,431,665Multiple-layer spacers for field-effect transistors201910,396,206Gate cut method201910,355,104Single-curvature cavity for semiconductor epitaxy201910,326,002Self-aligned gate contact and cross-coupling contact formation201910,192,746STI inner spacer to mitigate SDB loading201910,121,788Fin-type field effect transistors with single-diffusion breaks and method201810,090,382Integrated circuit structure including single diffusion break and end isolation region, and methods of forming same201810,083,873Semiconductor structure with uniform gate heights201810,083,874Gate cut method201810,056,486Methods for fin thinning providing improved SCE and S/D EPI growth201810,043,713Method to reduce FinFET short channel gate height20189,947,769Multiple-layer spacers for field-effect transistors20189,941,639Shielding arrangement for high-current applications20189,935,104Fin-type field effect transistors with single-diffusion breaks and method20189,859,644'Contact element'20189,831,591Catch element of a contact having a nose-shaped projection20179,666,969'Connector assembly contact having an outwardly projecting primary lance'20179,653,583'Methods of forming diffusion breaks on integrated circuit products comprised of finFET devices'20179,608,341'High-current plug-in connection with multi-arm contact lamellae'20179,553,194'Method for improved fin profile'20179,508,850'Epitaxial block layer for a fin field effect transistor device'20169,455,198'Methods of removing fins so as to form isolation structures on products that include FinFET semiconductor devices'20169,406,676'Method for forming single diffusion breaks between finFET devices and the resulting devices'20169,373,535'T-shaped fin isolation region and methods of fabrication'20169,362,176'Uniform exposed raised structures for non-planar semiconductor devices'20169,293,586'Epitaxial block layer for a fin field effect transistor device'2016D0750691'Smart projector'20169,219,002'Overlay performance for a fin field effect transistor device'20159,064,932'Methods of forming gate structures by a gate-cut-last process and the resulting structures'20158,987,083'Uniform gate height for semiconductor structure with N and P type fins'20158,846,491'Forming a diffusion break during a RMG process'2014Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2014–2020Patents assigned to GLOBALFOUNDRIES INC (32)· patent assignee history
2014–2020Based in Clifton Park, NY, US· patent location history
2016Patents assigned to SHENZHEN HOLATEK CO LTD (1)· patent assignee history
2016Based in Shenzhen, CN· patent location history
2017–2018Patents assigned to BOSCH GMBH ROBERT (5)· patent assignee history
2017–2018Based in Leonberg, DE· patent location history
2020Patents assigned to IBM (1)· patent assignee history
2020Based in Singapore, SG· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| GLOBALFOUNDRIES INC | 32 | 2014–2020 |
| BOSCH GMBH ROBERT | 5 | 2017–2018 |
| IBM | 1 | 2020 |
| SHENZHEN HOLATEK CO LTD | 1 | 2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Clifton Park, New York, US | 32 | 2014–2020 |
| Leonberg, DE | 5 | 2017–2018 |
| Singapore, SG | 1 | 2020 |
| Shenzhen, CN | 1 | 2016 |