Inventor
William John Saiki
Inventor
Mountain View, CA, US
Overview
Patents· 24 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores79%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems11%
H03FAmplifiers7%
G01RMeasuring electric variables4%
PatentTitleYear
8,213,233'Reduction of quick charge loss effect in a memory device'20128,169,832'Methods of erase verification for a flash memory device'20128,027,200'Reduction of quick charge loss effect in a memory device'20117,939,892'Test circuit and method for multilevel cell flash memory'20117,835,190'Methods of erase verification for a flash memory device'20107,831,872'Test circuit and method for multilevel cell flash memory'20107,826,267'Method and apparatus for reading and programming a non-volatile memory cell in a virtual ground array'20107,661,041'Test circuit and method for multilevel cell flash memory'20107,596,037'Independent bi-directional margin control per level and independently expandable reference cell levels for flash memory sensing'20097,325,177'Test circuit and method for multilevel cell flash memory'20087,184,345'High speed and high precision sensing for digital multilevel non-volatile memory system'20077,061,295'Ring oscillator for digital multilevel non-volatile memory'20067,038,538'Folded cascode high voltage operational amplifier with class AB source follower output stage'20067,038,960'High speed and high precision sensing for digital multilevel non-volatile memory system'20066,992,937'Column redundancy for digital multilevel nonvolatile memory'20066,967,524'High voltage generation and regulation system for digital multilevel nonvolatile memory'20056,885,600'Differential sense amplifier for multilevel non-volatile memory'20056,867,638'High voltage generation and regulation system for digital multilevel nonvolatile memory'20056,813,194'Bias distribution network for digital multilevel nonvolatile flash memory'20046,788,608'High voltage pulse method and apparatus for digital multilevel non-volatile memory integrated system'20046,590,453'Folded cascode high voltage operational amplifier with class AB source follower output stage'20036,590,825'Non-volatile flash fuse element'20035,968,196'Configuration control in a programmable logic device using non-volatile elements'19995,848,026'Integrated circuit with flag register for block selection of nonvolatile cells for bulk operations'1998Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1998–1999Patents assigned to ATMEL CORP (2)· patent assignee history
1998Based in San Jose, CA, US· patent location history
1999–2012Based in Mountain View, CA, US· patent location history
2003–2011Patents assigned to SILICON STORAGE TECH INC (18)· patent assignee history
2010–2012Patents assigned to MICRON TECHNOLOGY INC (4)· patent assignee history
2012Patents assigned to SAIKI WILLIAM (2)· patent assignee history
2012Patents assigned to SARIN VISHAL (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SILICON STORAGE TECH INC | 18 | 2003–2011 |
| MICRON TECHNOLOGY INC | 4 | 2010–2012 |
| ATMEL CORP | 2 | 1998–1999 |
| SAIKI WILLIAMself | 2 | 2012 |
| SARIN VISHAL | 2 | 2012 |
Locations
| Location | Patents | Span |
|---|---|---|
| Mountain View, California, US | 23 | 1999–2012 |
| San Jose, California, US | 1 | 1998 |