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Inventor

Casey Kurth

Inventor
Eagle, ID, US

Overview

60→
Patents
1997–2021
Patent span
Physics
Primary field (CPC G)

Patents· 60 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores43%
H10BElectronic memory devices11%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h109%
H01LSemiconductor devices8%
H10HInorganic light-emitting semiconductor devices having potential barriers8%
G01RMeasuring electric variables7%
H10DInorganic electric semiconductor devices5%
H05KPrinted circuits3%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h102%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
PatentTitleYear
11,037,918Back-to-back solid state lighting devices and associated methods202110,431,714Engineered substrates for semiconductor devices and associated systems and methods201910,062,677Back-to-back solid state lighting devices and associated methods20189,698,329'Solid-state light emitters having substrates with thermal and electrical conductivity enhancements and method of manufacture'20179,620,670'Solid state lighting dies with quantum emitters and associated methods of manufacturing'20179,443,834'Back-to-back solid state lighting devices and associated methods'20169,293,678'Solid-state light emitters having substrates with thermal and electrical conductivity enhancements and method of manufacture'20169,269,858'Engineered substrates for semiconductor devices and associated systems and methods'20167,440,255'Capacitor constructions and methods of forming'20087,366,946'ROM redundancy in ROM embedded DRAM'20087,218,547'ROM embedded DRAM with anti-fuse programming'20077,174,477'ROM redundancy in ROM embedded DRAM'20077,099,212'Embedded ROM device using substrate leakage'20067,012,006'Embedded ROM device using substrate leakage'20067,001,816'Embedded ROM device using substrate leakage'20066,996,021'ROM embedded DRAM with bias sensing'20066,903,991'Circuit for programming antifuse bits'20056,903,957'Half density ROM embedded DRAM'20056,865,130'ROM embedded DRAM with bias sensing'20056,865,100'6F2 architecture ROM embedded DRAM'20056,852,611'ROM embedded DRAM with dielectric removal/short'20056,834,022'Partial array self-refresh'20046,826,071'Circuit for programming antifuse bits'20046,788,603'ROM embedded DRAM with bias sensing'20046,785,167'ROM embedded DRAM with programming'20046,781,867'Embedded ROM device using substrate leakage'20046,771,529'ROM embedded DRAM with bias sensing'20046,768,664'ROM embedded DRAM with bias sensing'20046,747,889'Half density ROM embedded DRAM'20046,735,108'ROM embedded DRAM with anti-fuse programming'20046,731,556'DRAM with bias sensing'20046,724,238'Antifuse circuit with improved gate oxide reliability'20046,665,207'ROM embedded DRAM with dielectric removal/short'20036,661,693'Circuit for programming antifuse bits'20036,650,587'Partial array self-refresh'20036,646,459'Method for disabling and re-enabling access to IC test functions'20036,611,165'Antifuse circuit with improved gate oxide reliabilty'20036,603,693'DRAM with bias sensing'20036,590,407'Apparatus for disabling and re-enabling access to IC test functions'20036,570,400'Method for disabling and re-enabling access to IC test functions'20036,545,899'ROM embedded DRAM with bias sensing'20036,472,328'Methods of forming an electrical contact to semiconductive material'20026,445,605'Circuit for programming antifuse bits'20026,410,385'ROM-embedded-DRAM'20026,385,691'Memory device with command buffer that allows internal command buffer jumps'20026,356,491'Method and circuit for rapidly equilibrating paired digit lines of a memory device during testing'20026,281,131'Methods of forming electrical contacts'20016,255,838'Apparatus and method for disabling and re-enabling access to IC test functions'20016,255,837'Apparatus and method disabling and re-enabling access to IC test functions'20016,243,285'ROM-embedded-DRAM'20016,192,446'Memory device with command buffer'20016,160,413'Apparatus and method for disabling and re-enabling access to IC test functions'20006,137,737'Method and circuit for rapidly equilibrating paired digit lines of a memory device during testing'20006,134,137'Rom-embedded-DRAM'20006,130,834'Circuit for programming antifuse bits'20006,055,173'Circuit for programming antifuse bits'20005,732,033'Method and circuit for rapidly equilibrating paired digit lines of a memory device during testing'19985,721,703'Reprogrammable option select circuit'19985,689,455'Circuit for programming antifuse bits'19975,627,478'Apparatus for disabling and re-enabling access to IC test functions'1997

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1997–2021Patents assigned to MICRON TECHNOLOGY INC (58)· patent assignee history
1997–2008Based in Eagle, ID, US· patent location history
1997–2021Based in Boise, ID, US· patent location history
2016–2017Patents assigned to KURTH CASEY (4)· patent assignee history
2016–2017Patents assigned to BASCERI CEM (3)· patent assignee history
2016–2017Patents assigned to GEHRKE THOMAS (2)· patent assignee history
2016–2017Patents assigned to TETZ KEVIN (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
MICRON TECHNOLOGY INC581997–2021
KURTH CASEYself42016–2017
BASCERI CEM32016–2017
GEHRKE THOMAS22016–2017
TETZ KEVIN22016–2017
Locations
LocationPatentsSpan
Eagle, ID, US401997–2008
Boise, ID, US201997–2021