Inventor
Frank W. Mont
Inventor
Troy, NY, US
Overview
Patents· 25 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices32%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1031%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1021%
G02BOptical elements, systems or apparatus3%
Y10TTechnical subjects covered by former us classification3%
B82YSpecific uses or applications of nanostructures1%
C09DCoating compositions, e.g. paints, varnishes or lacquers1%
C23CCoating metallic material1%
C25FProcesses for the electrolytic removal of materials from objects1%
H10DInorganic electric semiconductor devices1%
PatentTitleYear
11,088,291Ultra-low reflectance broadband omni-directional anti-reflection coating202110,957,588Chamferless via structures202110,937,694Chamferless via structures202110,903,118Chamferless via structures202110,679,937Devices and methods of forming low resistivity noble metal interconnect202010,658,176Methods of mitigating cobalt diffusion in contact structures and the resulting devices202010,636,698Skip via structures202010,636,656Methods of protecting structure of integrated circuit from rework202010,388,565Chamferless via structures201910,283,608Low resistance contacts to source or drain region of transistor201910,262,892Skip via structures201910,157,833Via and skip via structures201810,062,560Method of cleaning semiconductor device201810,056,292Self-aligned lithographic patterning201810,056,291Post spacer self-aligned cuts201810,032,668Chamferless via structures20189,947,547Environmentally green process and composition for cobalt wet etch20189,831,174Devices and methods of forming low resistivity noble metal interconnect20179,831,124Interconnect structures20179,799,555'Cobalt interconnects covered by a metal cap'20179,799,559'Methods employing sacrificial barrier layer for protection of vias during trench formation'20179,732,427'Tunable nanoporous films on polymer substrates, and method for their manufacture'20179,613,862'Chamferless via structures'20179,373,543'Forming interconnect features with reduced sidewall tapering'20167,483,212'Optical thin film, semiconductor light emitting device having the same and methods of fabricating the same'2009Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2009–2021Patents assigned to RENSSELAER POLYTECH INST (3)· patent assignee history
2009–2021Based in Troy, NY, US· patent location history
2016–2021Patents assigned to GLOBALFOUNDRIES INC (21)· patent assignee history
2016–2021Patents assigned to IBM (9)· patent assignee history
2017Patents assigned to MONT FRANK W (1)· patent assignee history
2017Based in Albany, NY, US· patent location history
2018Patents assigned to LAM RES CORP (1)· patent assignee history
2021Based in Poughkeepsie, NY, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| GLOBALFOUNDRIES INC | 21 | 2016–2021 |
| IBM | 9 | 2016–2021 |
| RENSSELAER POLYTECH INST | 3 | 2009–2021 |
| LAM RES CORP | 1 | 2018 |
| MONT FRANK Wself | 1 | 2017 |
Locations
| Location | Patents | Span |
|---|---|---|
| Troy, New York, US | 23 | 2009–2021 |
| Poughkeepsie, New York, US | 1 | 2021 |
| Albany, New York, US | 1 | 2017 |