Inventor
Yasuo Naruke
Inventor
Kawasaki, JP
Overview
Patents· 6 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores25%
H10BElectronic memory devices25%
H10DInorganic electric semiconductor devices25%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1017%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h108%
PatentTitleYear
6,529,438'Semiconductor memory device implemented with a test circuit'20036,190,953'Semiconductor device and method for producing same'20016,013,931'Semiconductor device and method for producing the same'20005,172,337'Semiconductor memory device'19925,002,896'Mask-ROM manufacturing method that enhances integration density'19914,970,686'Semiconductor memory cells and semiconductor memory device employing the semiconductor memory cells'1990Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1990–2003Patents assigned to TOSHIBA KK (5)· patent assignee history
1990–1992Based in Kawasaki, JP· patent location history
2000–2001Based in Yokohama, JP· patent location history
2001Patents assigned to TOSHIBIA KK (1)· patent assignee history
2003Based in Kanagawa, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TOSHIBA KK | 5 | 1990–2003 |
| TOSHIBIA KK | 1 | 2001 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kawasaki, JP | 3 | 1990–1992 |
| Yokohama, JP | 2 | 2000–2001 |
| Kanagawa, JP | 1 | 2003 |