Inventor
Andrew D. Bailey, III
Inventor
Pleasanton, CA, US
Overview
Patents· 128 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1031%
H01JElectric discharge tubes or discharge lamps21%
H01LSemiconductor devices9%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h106%
H05HPlasma technique4%
B08BCleaning in general4%
G01BMeasuring length, thickness or similar linear dimensions3%
G06FElectric digital data processing3%
G01NInvestigating or analysing materials by determining their chemical or physical properties2%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices2%
PatentTitleYear
10,847,430Method of feature exaction from time-series of spectra to control endpoint of process202010,763,142System and method for determining field non-uniformities of a wafer processing chamber using a wafer processing parameter202010,622,195Multi zone gas injection upper electrode system202010,585,347Photoresist design layout pattern proximity correction through fast edge placement error prediction via a physics-based etch profile modeling framework202010,572,697Method of etch model calibration using optical scatterometry202010,553,399Pulsed plasma chamber in dual chamber configuration202010,534,257Layout pattern proximity correction through edge placement error prediction202010,504,704Plasma etching systems and methods using empirical mode decomposition201910,386,828Methods and apparatuses for etch profile matching by surface kinetic model optimization201910,386,821Systems and methods for calibrating scalar field contribution values for a limited number of sensors including a temperature value of an electrostatic chuck and estimating temperature distribution profiles based on calibrated values201910,312,121Systems and methods for aligning measurement device in substrate processing systems201910,303,830Methods and apparatuses for etch profile optimization by reflectance spectra matching and surface kinetic model optimization201910,262,910Method of feature exaction from time-series of spectra to control endpoint of process201910,242,849System and method for detecting a process point in multi-mode pulse processes201910,217,610Arrangements for manipulating plasma confinement within a plasma processing system and methods thereof201910,197,908Photoresist design layout pattern proximity correction through fast edge placement error prediction via a physics-based etch profile modeling framework201910,181,412Negative ion control for dielectric etch201910,032,681Etch metric sensitivity for endpoint detection20189,996,647Methods and apparatuses for etch profile optimization by reflectance spectra matching and surface kinetic model optimization20189,941,178Methods for detecting endpoint for through-silicon via reveal applications20189,864,361'Flexible temperature compensation systems and methods for substrate processing systems'20189,818,633'Equipment front end module for transferring wafers and method of transferring wafers'20179,792,393'Methods and apparatuses for etch profile optimization by reflectance spectra matching and surface kinetic model optimization'20179,793,128'Plasma processing chamber with dual axial gas injection and exhaust'20179,735,069'Method and apparatus for determining process rate'20179,721,782'Method and apparatus for shaping a gas profile near bevel edge'20179,640,371'System and method for detecting a process point in multi-mode pulse processes'20179,564,308'Methods for processing bevel edge etching'20179,548,189'Plasma etching systems and methods using empirical mode decomposition'20179,543,225'Systems and methods for detecting endpoint for through-silicon via reveal applications'20179,418,859'Plasma-enhanced etching in an augmented plasma processing system'20169,281,166'Plasma processing chamber for bevel edge processing'20169,275,838'Arrangements for manipulating plasma confinement within a plasma processing system and methods thereof'20169,263,240'Dual zone temperature control of upper electrodes'20169,184,028'Dual plasma volume processing apparatus for neutral/ion flux control'20159,184,043'Edge electrodes with dielectric covers'20159,123,582'Methods of in-situ measurements of wafer bow'20159,117,767'Negative ion control for dielectric etch'20159,053,925'Configurable bevel etcher'20159,039,911'Plasma-enhanced etching in an augmented plasma processing system'20158,940,098'Method for distributing gas for a bevel etcher'20158,926,789'Apparatus for the removal of a fluorinated polymer from a substrate'20158,900,398'Local plasma confinement and pressure control arrangement and methods thereof'20148,883,027'Methods for removing a metal oxide from a substrate'20148,869,742'Plasma processing chamber with dual axial gas injection and exhaust'20148,852,384'Method and apparatus for detecting plasma unconfinement'20148,764,907'Servicing a plasma processing system with a robot'20148,721,908'Bevel etcher with vacuum chuck'20148,691,701'Strip with reduced low-K dielectric damage'20148,673,111'Plasma processing chamber for bevel edge processing'20148,652,298'Triode reactor design with multiple radiofrequency powers'20148,580,078'Bevel etcher with vacuum chuck'20138,574,397'Bevel edge plasma chamber with top and bottom edge electrodes'20138,500,951'Low-K damage avoidance during bevel etch processing'20138,475,624'Method and system for distributing gas for a bevel edge etcher'20138,470,126'Wiggling control for pseudo-hardmask'20138,440,051'Plasma processing chamber for bevel edge processing'20138,414,790'Bevel plasma treatment to enhance wet edge clean'20138,398,875'Method of orienting an upper electrode relative to a lower electrode for bevel edge processing'20138,349,202'Methods for controlling bevel edge etching in a plasma chamber'20138,308,896'Methods to remove films on bevel edge and backside of wafer and apparatus thereof'20128,304,262'Wiggling control for pseudo-hardmask'20128,298,433'Methods for removing an edge polymer from a substrate'20128,268,116'Methods of and apparatus for protecting a region of process exclusion adjacent to a region of process performance in a process chamber'20128,257,503'Method and apparatus for detecting plasma unconfinement'20128,252,140'Plasma chamber for wafer bevel edge processing'20128,236,188'Method for low-K dielectric etch with reduced damage'20128,225,683'Wafer bow metrology arrangements and methods thereof'20128,211,238'System, method and apparatus for self-cleaning dry etch'20128,185,242'Dynamic alignment of wafers using compensation values obtained through a series of wafer movements'20128,154,209'Modulated multi-frequency processing method'20128,137,501'Bevel clean device'20128,135,485'Offset correction techniques for positioning substrates within a processing chamber'20128,127,395'Apparatus for isolated bevel edge clean and method for using the same'20128,083,890'Gas modulation to control edge exclusion in a bevel edge etching plasma chamber'20118,017,516'Method for stress free conductor removal'20117,981,307'Method and apparatus for shaping gas profile near bevel edge'20117,959,984'Methods and arrangement for the reduction of byproduct deposition in a plasma processing system'20117,943,007'Configurable bevel etcher'20117,938,931'Edge electrodes with variable power'20117,922,866'Apparatus for aligning electrodes in a process chamber to protect an exclusion area within an edge environ of a wafer'20117,909,960'Apparatus and methods to remove films on bevel edge and backside of wafer'20117,858,898'Bevel etcher with gap control'20107,718,542'Low-k damage avoidance during bevel etch processing'20107,691,278'Apparatus for the removal of a fluorinated polymer from a substrate and methods therefor'20107,680,712'Electronic processing system'20107,662,254'Methods of and apparatus for aligning electrodes in a process chamber to protect an exclusion area within an edge environ of a wafer'20107,662,253'Apparatus for the removal of a metal oxide from a substrate and methods therefor'20107,653,515'Expert knowledge methods and systems for data analysis'20107,651,585'Apparatus for the removal of an edge polymer from a substrate and methods therefor'20107,611,640'Minimizing arcing in a plasma processing chamber'20097,575,638'Apparatus for defining regions of process exclusion and process performance in a process chamber'20097,540,935'Plasma oxidation and removal of oxidized material'20097,486,878'Offset correction methods and arrangement for positioning and inspecting substrates'20097,480,571'Apparatus and methods for improving the stability of RF power delivery to a plasma load'20097,479,236'Offset correction techniques for positioning substrates'20097,413,673'Method for adjusting voltage on a powered Faraday shield'20087,403,001'Methods and apparatus for measuring morphology of a conductive film on a substrate'20087,347,915'Plasma in-situ treatment of chemically amplified resist'20087,295,954'Expert knowledge methods and systems for data analysis'20077,282,909'Methods and apparatus for determining the thickness of a conductive layer on a substrate'20077,242,185'Method and apparatus for measuring a conductive film at the edge of a substrate'20077,239,737'User interface for quantifying wafer non-uniformities and graphically explore significance'20077,232,766'System and method for surface reduction, passivation, corrosion prevention and activation of copper surface'20077,217,649'System and method for stress free conductor removal'20077,173,418'Methods and apparatus for optimizing an electrical response to a set of conductive layers on a substrate'20077,164,282'Methods and apparatus for determining an average electrical response to a conductive layer on a substrate'20077,140,374'System, method and apparatus for self-cleaning dry etch'20067,130,767'Computer-implemented data presentation techniques for a plasma processing system'20067,129,167'Methods and systems for a stress-free cleaning a surface of a substrate'20067,086,347'Apparatus and methods for minimizing arcing in a plasma processing chamber'20067,078,344'Stress free etch processing in combination with a dynamic liquid meniscus'20067,067,034'Method and apparatus for plasma forming inner magnetic bucket to control a volume of a plasma'20067,022,611'Plasma in-situ treatment of chemically amplified resist'20067,009,281'Small volume process chamber with hot inner surfaces'20066,939,796'System, method and apparatus for improved global dual-damascene planarization'20056,873,112'Method for producing a semiconductor device'20056,842,147'Method and apparatus for producing uniform processing rates'20056,838,832'Apparatus and methods for improving the stability of RF power delivery to a plasma load'20056,821,899'System, method and apparatus for improved local dual-damascene planarization'20046,744,213'Antenna for producing uniform process rates'20046,723,574'Method for quantifying uniformity patterns and including expert knowledge for tool development and control'20046,653,791'Method and apparatus for producing uniform process rates'20036,518,705'Method and apparatus for producing uniform process rates'20036,341,574'Plasma processing systems'20026,322,661'Method and apparatus for controlling the volume of a plasma'20016,320,320'Method and apparatus for producing uniform process rates'20016,302,966'Temperature control system for plasma processing apparatus'2001Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2001–2020Patents assigned to LAM RES CORP (126)· patent assignee history
2001–2020Based in Pleasanton, CA, US· patent location history
2011–2020Patents assigned to BAILEY III ANDREW D (35)· patent assignee history
2011–2016Patents assigned to KIM YUNSANG (15)· patent assignee history
2012–2020Patents assigned to DHINDSA RAJINDER (8)· patent assignee history
2012–2020Patents assigned to HUDSON ERIC (5)· patent assignee history
2016Based in Fremont, CA, US· patent location history
2017–2020Based in San Jose, CA, US· patent location history
2018–2020Based in Milpitas, CA, US· patent location history
2019Based in Pleansanton, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| LAM RES CORP | 126 | 2001–2020 |
| BAILEY III ANDREW Dself | 35 | 2011–2020 |
| KIM YUNSANG | 15 | 2011–2016 |
| DHINDSA RAJINDER | 8 | 2012–2020 |
| HUDSON ERIC | 5 | 2012–2020 |
Locations
| Location | Patents | Span |
|---|---|---|
| Pleasanton, California, US | 118 | 2001–2020 |
| Milpitas, California, US | 4 | 2018–2020 |
| San Jose, California, US | 3 | 2017–2020 |
| Pleansanton, California, US | 1 | 2019 |
| Fremont, California, US | 1 | 2016 |