Inventor
Yin-Pin Wang
Inventor
Kaohsiung, TW
Overview
Patents· 16 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices34%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1020%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1014%
H01LSemiconductor devices11%
H04WWireless communication networks6%
B60WConjoint control of vehicle sub-units of different type or different function3%
H04BTransmission3%
H04JMultiplex communication3%
H04LTransmission of digital information, e.g. telegraphic communication3%
H10BElectronic memory devices3%
PatentTitleYear
11,039,458Methods and apparatuses for transmission scheduling on multiple frequencies202110,504,898Fin field-effect transistor structure and method for forming the same201910,497,577Fin field-effect transistor device and method201910,468,500FinFET fabrication methods20199,466,716'Dual-SiGe epitaxy for MOS devices'20168,848,675'Time-division multiplexed pilot signal for integrated mobile broadcasts'20147,750,338'Dual-SiGe epitaxy for MOS devices'20107,453,121'Body contact formation in partially depleted silicon on insulator device'20087,449,753'Write margin improvement for SRAM cells with SiGe stressors'20087,253,062'Semiconductor device with asymmetric pocket implants'20077,129,547'Method of fabricating a high performance MOSFET device featuring formation of an elevated source/drain region'20067,009,248'Semiconductor device with asymmetric pocket implants'20066,960,512'Method for manufacturing a semiconductor device having an improved disposable spacer'20056,902,980'Method of fabricating a high performance MOSFET device featuring formation of an elevated source/drain region'20056,656,845'Method for forming semiconductor substrate with convex shaped active region'20036,277,709'Method of forming shallow trench isolation structure'2001Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2001–2019Based in Kaohsiung, TW· patent location history
2003–2010Patents assigned to TAIWAN SEMICONDUCTOR MFG (8)· patent assignee history
2003Based in Koshing, TW· patent location history
2005Patents assigned to TAIWAIN SEMICONDUCTOR MFG COMP (1)· patent assignee history
2014Patents assigned to ERICSSON TELEFON AB L M (1)· patent assignee history
2014Based in Fremont, CA, US· patent location history
2016–2019Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (4)· patent assignee history
2019Based in New Taipei, TW· patent location history
2021Patents assigned to QUALCOMM INC (1)· patent assignee history
2021Based in San Diego, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG | 8 | 2003–2010 |
| TAIWAN SEMICONDUCTOR MFG CO LTD | 4 | 2016–2019 |
| ERICSSON TELEFON AB L M | 1 | 2014 |
| QUALCOMM INC | 1 | 2021 |
| TAIWAIN SEMICONDUCTOR MFG COMP | 1 | 2005 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kaohsiung, TW | 11 | 2001–2019 |
| New Taipei, TW | 2 | 2019 |
| San Diego, California, US | 1 | 2021 |
| Fremont, California, US | 1 | 2014 |
| Koshing, TW | 1 | 2003 |