Inventor
Kosuke Inoue
Inventor
Fujisawa, JP
Overview
Patents· 27 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1028%
H05KPrinted circuits22%
B23KSoldering or unsoldering18%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h109%
C22CAlloys7%
G06KGraphical data reading6%
Y10TTechnical subjects covered by former us classification3%
A61MDevices for introducing media into, or onto, the body1%
B23QDetails, components, or accessories for machine tools, e.g. arrangements for copying or controlling1%
G01FMeasuring volume, volume flow, mass flow or liquid level1%
PatentTitleYear
10,518,362Solder alloy, solder paste, and electronic circuit board201910,328,542Tool path-generating method, drilling method, and tool path-generating device201910,099,321Flux and solder paste20189,956,649Solder alloy, solder paste, and electronic circuit board20189,931,716Solder alloy, solder composition, solder paste, and electronic circuit board20189,597,476'Flow sensor and method'20179,445,508'Solder alloy, solder paste, and electronic circuit board'20167,413,130'Paper tag identified by using radiofrequency and method of manufacturing the same'20087,190,072'RFID-chip having RFID-tag or magnifying electrode'20077,185,823'Paper tag identified by using radiofrequency and method of manufacturing the same'20077,122,087'Method of manufacturing RFID'20067,057,283'Semiconductor device and method for producing the same'20066,930,388'Semiconductor device and method for manufacturing the same and semiconductor device-mounted structure'20056,869,008'Method of forming bumps'20056,822,317'Semiconductor apparatus including insulating layer having a protrusive portion'20046,770,547'Method for producing a semiconductor device'20046,695,200'Method of producing electronic part with bumps and method of producing electronic part'20046,624,504'Semiconductor device and method for manufacturing the same'20036,595,404'Method of producing electronic part with bumps and method of producing electronic part'20036,471,115'Process for manufacturing electronic circuit devices'20026,460,755'Bump forming method and apparatus therefor'20026,413,850'Method of forming bumps'20026,402,014'Method of forming bumps'20026,400,020'Aggregate of semiconductor devices including semiconductor packages arranged on a first tape and wound on a reel and also including a spacer tape provided with spacers'20026,213,386'Method of forming bumps'20016,146,920'Bump formation method'20004,063,043'Intraoffice alternate connection arrangement'1977Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2000–2008Patents assigned to HITACHI LTD (16)· patent assignee history
2000–2002Patents assigned to HITACHI TOKYO ELECTRONICS (2)· patent assignee history
2000–2002Patents assigned to HITACHI ULSI SYS CO LTD (2)· patent assignee history
2000–2002Based in Yokohama, JP· patent location history
2001–2008Based in Fujisawa, JP· patent location history
2004–2005Patents assigned to RENESAS TECH CORP (3)· patent assignee history
2016–2019Patents assigned to HARIMA CHEMICALS INC (5)· patent assignee history
2016–2019Based in Hyogo, JP· patent location history
2017Based in Corona Del Mar, CA, US· patent location history
2019Based in Kanagawa, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| HITACHI LTD | 16 | 2000–2008 |
| HARIMA CHEMICALS INC | 5 | 2016–2019 |
| RENESAS TECH CORP | 3 | 2004–2005 |
| HITACHI TOKYO ELECTRONICS | 2 | 2000–2002 |
| HITACHI ULSI SYS CO LTD | 2 | 2000–2002 |
Locations
| Location | Patents | Span |
|---|---|---|
| Fujisawa, JP | 15 | 2001–2008 |
| Hyogo, JP | 5 | 2016–2019 |
| Yokohama, JP | 4 | 2000–2002 |
| Kanagawa, JP | 1 | 2019 |
| Corona Del Mar, California, US | 1 | 2017 |