Inventor
Brad D. Rumsey
Inventor
Meridian, ID, US
Overview
Patents· 32 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1039%
Y10TTechnical subjects covered by former us classification28%
H05KPrinted circuits17%
B33YAdditive manufacturing, i.e. manufacturing of three-dimensional [3d] objects by additive deposition, additive agglomeration or additive layering, e.g. by 3d printing, stereolithography or selective laser sintering9%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h106%
Y02PClimate change mitigation technologies in the production or processing of goods1%
PatentTitleYear
7,951,646'Solder ball landpad design to improve laminate performance'20117,335,571'Method of making a semiconductor device having an opening in a solder mask'20087,307,850'Soldermask opening to prevent delamination'20077,263,768'Method of making a semiconductor device having an opening in a solder mask'20077,255,273'Descriptor for identifying a defective die site'20077,146,720'Fabricating a carrier substrate by using a solder resist opening as a combination pin one indicator and fiducial'20067,127,365'Method for identifying a defective die site'20067,115,819'Positioning flowable solder for bonding integrated circuit elements'20067,088,590'Soldermask opening to prevent delamination'20067,019,223'Solder resist opening to define a combination pin one indicator and fiducial'20067,013,559'Method of fabricating a semiconductor device package'20066,984,894'Semiconductor package having a partial slot cover for encapsulation process'20066,914,326'Solder ball landpad design to improve laminate performance'20056,889,902'Descriptor for identifying a defective die site and methods of formation'20056,790,708'Encapsulation process using a partial slot cover and a package formed by the process'20046,734,372'Gate area relief strip for a molded I/C package'20046,690,086'Apparatus and method for reducing interposer compression during molding process'20046,668,449'Method of making a semiconductor device having an opening in a solder mask'20036,671,182'Soldermask opening to prevent delamination'20036,644,949'Apparatus for reduced flash encapsulation of microelectronic devices'20036,638,595'Method and apparatus for reduced flash encapsulation of microelectronic devices'20036,634,099'Soldermask opening to prevent delamination'20036,577,015'Partial slot cover for encapsulation process'20036,577,004'Solder ball landpad design to improve laminate performance'20036,521,980'Controlling packaging encapsulant leakage'20036,518,678'Apparatus and method for reducing interposer compression during molding process'20036,473,311'Gate area relief strip for a molded I/C package'20026,415,977'Method and apparatus for marking and identifying a defective die site'20026,395,579'Controlling packaging encapsulant leakage'20026,365,434'Method and apparatus for reduced flash encapsulation of microelectronic devices'20026,356,452'Soldermask opening to prevent delamination'20026,210,992'Controlling packaging encapsulant leakage'2001Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2001–2008Patents assigned to MICRON TECHNOLOGY INC (30)· patent assignee history
2001–2011Based in Meridian, ID, US· patent location history
2002Patents assigned to MICRO TECHNOLOGY INC (1)· patent assignee history
2011Patents assigned to ROUND ROCK RES LLC (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MICRON TECHNOLOGY INC | 30 | 2001–2008 |
| MICRO TECHNOLOGY INC | 1 | 2002 |
| ROUND ROCK RES LLC | 1 | 2011 |
Locations
| Location | Patents | Span |
|---|---|---|
| Meridian, ID, US | 32 | 2001–2011 |