Inventor

Qian Tao

Inventor
Boise, ID, US

Overview

57→
Patents
2009–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 57 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H01Lprimary
H01LSemiconductor devices26%
H10BElectronic memory devices21%
H10DInorganic electric semiconductor devices15%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1011%
H10NElectric solid-state devices not otherwise provided for7%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h105%
H01GCapacitors3%
LOC143%
G11CStatic stores2%
H04NPictorial communication, e.g. television1%
PatentTitleYear
11,043,502Semiconductor devices including ferroelectric materials202111,031,333Three-dimensional memory devices having a plurality of NAND strings202110,868,031Multiple-stack three-dimensional memory device and fabrication method thereof202010,847,528Memory cell structure of a three-dimensional memory device202010,804,279Source structure of three-dimensional memory device and method for forming the same202010,804,287Three-dimensional memory devices and fabricating methods thereof202010,790,2903D NAND with integral drain-end select gate (SGD)202010,763,099Wafer flatness control using backside compensation structure202010,762,939Computer memory202010,741,567Memory cells202010,680,003Staircase structure for memory device202010,658,378Through array contact (TAC) for three-dimensional memory devices202010,658,379Array common source structures of three-dimensional memory devices and fabricating methods thereof202010,651,193Memory device and forming method thereof202010,644,015Memory cell structure of a three-dimensional memory device202010,580,788Methods for forming three-dimensional memory devices202010,541,252Memory arrays, and methods of forming memory arrays202010,515,975Method for forming dual-deck channel hole structure of three-dimensional memory device201910,418,554Methods of forming memory cells and semiconductor devices201910,403,631Three-dimensional ferroelectric memory devices201910,403,630Semiconductor devices including ferroelectric materials201910,388,871Memory cells and methods of forming memory cells201910,304,853Memory arrays, and methods of forming memory arrays201910,298,793Imaging devices with drive assembly and drive assembly locking mechanism201910,283,452Three-dimensional memory devices having a plurality of NAND strings201910,242,989Polar, chiral, and non-centro-symmetric ferroelectric materials, memory cells including such materials, and related devices and methods201910,217,753Memory cells201910,211,281Isolation device201910,193,064Memory cells including dielectric materials, memory devices including the memory cells, and methods of forming same201910,147,732Source structure of three-dimensional memory device and method for forming the same201810,083,981Memory arrays, and methods of forming memory arrays201810,062,703Methods of forming a ferroelectric memory cell20189,887,204'Memory cells'20189,824,965'Isolation device'20179,793,203'Isolation device'20179,716,225'Memory cells including dielectric materials, memory devices including the memory cells, and methods of forming same'20179,698,343'Semiconductor device structures including ferroelectric memory cells'20179,673,203'Memory cells'20179,576,891'Isolation device'20179,520,920'Transmitting and receiving digital and analog signals across an isolator using amplitude modulation'20169,520,354'Silicon designs for high voltage isolation'20169,508,931'Memory cells and methods of forming memory cells'2016D0766245'Imaging device'20169,397,143'Liner for phase change memory (PCM) array and associated techniques and configurations'20169,385,746'Dynamic offset cancellation in sigma-delta converter'20169,332,146'Lid position detector for an image scanner'20169,305,929'Memory cells'20169,257,039'Method for detecting time synchronization ability of real-time measuring device based on time variable'20169,231,206'Methods of forming a ferroelectric memory cell'2016D0745871'Imaging device'20159,147,689'Methods of forming ferroelectric capacitors'20159,087,853'Isolation device'20158,921,821'Memory cells'20148,692,200'Optical proximity sensor with improved dynamic range and sensitivity'2014D0681108'Printer'2013D0680163'Multi-function imaging and printing device'2013D0595347'Printer'2009

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2009–2019Patents assigned to HEWLETT PACKARD DEVELOPMENT CO (6)· patent assignee history
2009–2019Based in Singapore, SG· patent location history
2013–2019Patents assigned to TAO QIAN (4)· patent assignee history
2014–2021Patents assigned to MICRON TECHNOLOGY INC (21)· patent assignee history
2014–2017Patents assigned to AVAGO TECHNOLOGIES GENERAL IP (8)· patent assignee history
2014–2021Based in Boise, ID, US· patent location history
2016–2021Based in Hubei, CN· patent location history
2018–2021Patents assigned to YANGTZE MEMORY TECH CO LTD (15)· patent assignee history
2020Based in Wuhan, CN· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
MICRON TECHNOLOGY INC212014–2021
YANGTZE MEMORY TECH CO LTD152018–2021
AVAGO TECHNOLOGIES GENERAL IP82014–2017
HEWLETT PACKARD DEVELOPMENT CO62009–2019
TAO QIANself42013–2019
Locations
LocationPatentsSpan
Boise, ID, US252014–2021
Singapore, SG162009–2019
Hubei, CN142016–2021
Wuhan, CN22020