Inventor
Herman Lee Blackmon
Inventor
Moline, IL, US
Overview
Patents· 21 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing72%
G11CStatic stores20%
H04LTransmission of digital information, e.g. telegraphic communication8%
PatentTitleYear
8,572,455'Systems and methods to respond to error detection'20138,549,217'Spacing periodic commands to a volatile memory for increased performance and decreased collision'20138,539,309'System and method for responding to error detection'20138,397,100'Managing memory refreshes'20138,352,786'Compressed replay buffer'20138,205,138'Memory controller for reducing time to initialize main memory'20128,132,048'Systems and methods to efficiently schedule commands at a memory controller'20128,127,087'Memory controller for improved read port selection in a memory mirrored system'20128,082,396'Selecting a command to send to memory'20118,028,128'Method for increasing cache directory associativity classes in a system with a register space memory'20117,925,857'Method for increasing cache directory associativity classes via efficient tag bit reclaimation'20117,650,259'Method for tuning chipset parameters to achieve optimal performance under varying workload types'20107,010,654'Methods and systems for re-ordering commands to access memory'20066,963,516'Dynamic optimization of latency and bandwidth on DRAM interfaces'20056,895,482'Reordering and flushing commands in a computer memory subsystem'20056,628,662'Method and system for multilevel arbitration in a non-blocking crossbar switch'20036,523,080'Shared bus non-sequential data ordering method and apparatus'20036,513,091'Data routing using status-response signals'20036,505,306'Redundant bit steering mechanism with delayed switchover of fetch operations during redundant device initialization'20036,188,627'Method and system for improving DRAM subsystem performance using burst refresh control'20015,748,919'Shared bus non-sequential data ordering method and apparatus'1998Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1998–2013Patents assigned to IBM (21)· patent assignee history
1998–2006Based in Rochester, MN, US· patent location history
2005–2013Based in Moline, IL, US· patent location history
2012–2013Patents assigned to KIRSCHT JOSEPH A (7)· patent assignee history
2012–2013Patents assigned to MCGLONE ELIZABETH A (7)· patent assignee history
2012–2013Patents assigned to HARADEN RYAN S (5)· patent assignee history
2012–2013Patents assigned to BLACKMON H LEE (4)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 21 | 1998–2013 |
| KIRSCHT JOSEPH A | 7 | 2012–2013 |
| MCGLONE ELIZABETH A | 7 | 2012–2013 |
| HARADEN RYAN S | 5 | 2012–2013 |
| BLACKMON H LEEself | 4 | 2012–2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Moline, Illinois, US | 13 | 2005–2013 |
| Rochester, Minnesota, US | 8 | 1998–2006 |