Inventor

Chia-Shiung Tsai

Inventor

Hsinchu, TW

Overview

1996–2020

Patent span

Electricity

Primary field (CPC H)

Patents· 435 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H01Lprimary

H01LSemiconductor devices21%

H10DInorganic electric semiconductor devices16%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1015%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1013%

H10BElectronic memory devices10%

H10NElectric solid-state devices not otherwise provided for5%

H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation5%

G11CStatic stores2%

B81CProcesses or apparatus specially adapted for the manufacture or treatment of microstructural devices or systems2%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests1%

PatentTitleYear

10,868,024Method of forming embedded nonvolatile memory2020 10,840,438Reversed stack MTJ2020 10,840,2873DIC interconnect apparatus and method2020 10,825,825Flash memory structure2020 10,818,857Organic photosensitive device with an electron-blocking and hole-transport layer2020 10,811,504Semiconductor structure for flash memory cells and method of making same2020 10,804,101Semiconductor structure having sets of III-V compound layers and method of forming2020 10,790,1893D integrated circuit and methods of forming the same2020 10,781,098Method of manufacturing semiconductor structure2020 10,777,649Silicon nano-tip thin film for flash memory cells2020 10,756,222Backside illuminated photo-sensitive device with gradated buffer layer2020 10,748,967Image sensors with organic photodiodes and methods for forming the same2020 10,727,097Mechanisms for cleaning substrate surface for hybrid bonding2020 10,683,204Semiconductor arrangement and formation thereof2020 10,665,456Semiconductor structure2020 10,665,449Integrate rinse module in hybrid bonding platform2020 10,665,600Memory devices and method of fabricating same2020 10,658,474Method for forming thin semiconductor-on-insulator (SOI) substrates2020 10,643,964Structures for bonding a group III-V device to a substrate by stacked conductive bumps2020 10,629,811Resistance variable memory structure and method of forming the same2020 10,614,948Method for forming inductor structure with magnetic material2020 10,553,785Magnetoresistive random access memory device and method of making same2020 10,553,474Method for forming a semiconductor-on-insulator (SOI) substrate2020 10,529,916Reversed stack MTJ2020 10,522,532Through via extending through a group III-V layer2019 10,516,026Split gate memory device and method of fabricating the same2019 10,516,107Memory cell having resistance variable film and method of making the same2019 10,510,723Buffer layer(s) on a stacked structure having a via2019 10,510,763Embedded nonvolatile memory and forming method thereof2019 10,509,312Approach for ultra thin-film transfer and handling2019 10,510,597Methods for hybrid wafer bonding integrated with CMOS processing2019 10,504,756Wafer processing method and apparatus2019 10,504,904Semiconductor arrangement with capacitor and method of fabricating the same2019 10,497,860Perpendicular magnetic random-access memory (MRAM) formation by direct self-assembly method2019 10,497,560Uniformity control for Si dot size in flash memory2019 10,497,773Method to improve MIM device performance2019 10,483,386Semiconductor device, transistor having doped seed layer and method of manufacturing the same2019 10,453,889Dual facing BSI image sensors with wafer level stacking2019 10,453,932Semiconductor structure for flash memory cells and method of making same2019 10,388,865High yield RRAM cell with optimized film scheme2019 10,361,2343DIC interconnect apparatus and method2019 10,354,972Hybrid bonding systems and methods for semiconductor wafers2019 10,355,011Method for forming flash memory structure2019 10,325,956Deep trench isolation shrinkage method for enhanced device performance2019 10,325,910Semiconductor device containing HEMT and MISFET and method of forming the same2019 10,322,930Semiconductor arrangement and formation thereof2019 10,297,604Split gate memory devices and methods of manufacturing2019 10,290,502Apparatus for reducing stripe patterns2019 10,280,076Semiconductor structure and manufacturing method thereof2019 10,283,448Multiple metal layer semiconductor device and low temperature stacking method of fabricating the same2019 10,269,711Semiconductor device and method for manufacturing the same2019 10,269,807Semiconductor arrangement having capacitor separated from active region2019 10,193,065High K scheme to improve retention performance of resistive random access memory (RRAM)2019 10,181,558Magnetoresistive random access memory structure and method of forming the same2019 10,170,699RRAM cell bottom electrode formation2019 10,164,184Resistance variable memory structure and method of forming the same2018 10,163,972Image sensing device with photon blocking layer and anti-reflective coating2018 10,157,994High electron mobility transistor and method of forming the same2018 10,158,069Memory cell having resistance variable film and method of making the same2018 10,157,820Methods for manufacturing a thin film resistor over interconnect pads2018 10,157,706Inductor structure with magnetic material2018 10,155,214Getter, MEMS device and method of forming the same2018 10,147,794Split gate memory device and method of fabricating the same2018 10,138,118Structure to reduce backside silicon damage2018 10,134,945Wafer to wafer bonding techniques for III-V wafers and CMOS wafers2018 10,128,113Semiconductor structure and manufacturing method thereof2018 10,119,909Biological sensing structures2018 10,109,756Backside illuminated photo-sensitive device with gradated buffer layer2018 10,103,122Hybrid bonding systems and methods for semiconductor wafers2018 10,090,1963D integrated circuit and methods of forming the same2018 10,079,296High electron mobility transistor with indium nitride layer2018 10,079,257Anti-reflective layer for backside illuminated CMOS image sensors2018 10,074,537Method of forming semiconductor structure having sets of III-V compound layers2018 10,049,890Semiconductor structure and method of manufacturing the same2018 10,012,899Graphene pellicle for extreme ultraviolet lithography2018 10,008,531Varied STI liners for isolation structures in image sensing devices2018 10,008,506Semiconductor arrangement with capacitor2018 10,008,546Image sensors with organic photodiodes and methods for forming the same2018 10,003,022RRAM cell structure with conductive etch-stop layer2018 9,991,440Magnetoresistive random access memory cell and fabricating the same2018 9,978,754Semiconductor arrangement with capacitor2018 9,978,759Memory devices and method of forming same2018 9,978,603Memory devices and method of fabricating same2018 9,960,285Contact structure2018 9,960,353Method of fabricating an organic photodiode with dual electron blocking layers2018 9,960,129Hybrid bonding mechanisms for semiconductor wafers2018 9,944,516High aspect ratio etch without upper widening2018 9,941,3203DIC interconnect apparatus and method2018 9,929,007'e-Flash Si dot nitrogen passivation for trap reduction'2018 9,917,069'Hybrid bonding system and cleaning method thereof'2018 9,911,734'Semiconductor device containing HEMT and MISFET and method of forming the same'2018 9,887,155'Multiple metal layer semiconductor device and low temperature stacking method of fabricating the same'2018 9,876,093High electron mobility transistor and method of forming the same2018 9,876,167High yield RRAM cell with optimized film scheme2018 9,876,184Organic photosensitive device with an electron-blocking and hole-transport layer2018 9,865,389'Inductor structure with magnetic material'2018 9,859,295'Method for forming flash memory structure'2018 9,853,091Side bottom contact RRAM structure2017 9,837,606Resistance variable memory structure and method of forming the same2017 9,837,605Memory cell having resistance variable film and method of making the same2017 9,837,291Wafer processing method and apparatus2017 9,837,421Semiconductor arrangement having capacitor separated from active region2017 9,825,117'MIM/RRAM structure with improved capacitance and reduced leakage current'2017 9,825,040'Semiconductor arrangement with capacitor and method of fabricating the same'2017 9,793,243'Buffer layer(s) on a stacked structure having a via'2017 9,786,628'Air trench in packages incorporating hybrid bonding'2017 9,771,256'Micro electro mechanical system (MEMS) device having via extending through plug'2017 9,768,220'Deep trench isolation structure for image sensors'2017 9,754,813'Bond chuck, methods of bonding, and tool including bond chuck'2017 9,748,198'Hybrid bonding systems and methods for semiconductor wafers'2017 9,748,373'MISFET device'2017 9,748,255'Split gate memory devices and methods of manufacturing'2017 9,741,681'Debonding schemes'2017 9,738,516'Structure to reduce backside silicon damage'2017 9,728,597'Metal-insulator-metal structure and method for forming the same'2017 9,728,453'Methods for hybrid wafer bonding integrated with CMOS processing'2017 9,728,719'Leakage resistant RRAM/MIM structure'2017 9,722,011'Film scheme for MIM device'2017 9,711,555'Dual facing BSI image sensors with wafer level stacking'2017 9,704,820'Semiconductor manufacturing method and associated semiconductor manufacturing system'2017 9,685,518'Method of forming semiconductor structure of control gate, and semiconductor device'2017 9,679,980'Common source oxide formation by in-situ steam oxidation for embedded flash'2017 9,679,979'Semiconductor structure for flash memory cells and method of making same'2017 9,673,205'Embedded nonvolatile memory and forming method thereof'2017 9,660,063'Semiconductor structure having sets of III-V compound layers and method of forming the same'2017 9,653,507'Deep trench isolation shrinkage method for enhanced device performance'2017 9,647,207'Resistive random access memory (RRAM) structure'2017 9,637,375'MEMS device having a getter structure and method of forming the same'2017 9,634,096'Semiconductor device with trench isolation'2017 9,634,105'Silicon nano-tip thin film for flash memory cells'2017 9,627,467'Thin film resistor integrated between interconnect levels and contacting an underlying dielectric layer protrusion'2017 9,627,243'Method and apparatus of holding a device'2017 9,620,372'HK embodied flash memory and methods of forming the same'2017 9,611,141'Self-removal anti-stiction coating for bonding process'2017 9,614,145'Reversed stack MTJ'2017 9,608,195'Magnetic tunnel junction device'2017 9,595,589'Transistor with performance boost by epitaxial layer'2017 9,595,661'Magnetoresistive random access memory structure and method of forming the same'2017 9,595,521'Capacitive device'2017 9,577,077'Well controlled conductive dot size in flash memory'2017 9,577,191'RRAM cell bottom electrode formation'2017 9,570,536'Method for forming an inductor structure with magnetic material'2017 9,564,448'Flash memory structure'2017 9,559,177'Memory devices and method of fabricating same'2017 9,558,988'Method for filling the trenches of shallow trench isolation (STI) regions'2017 9,553,096'Semiconductor arrangement with capacitor'2017 9,553,154'Memory devices and method of fabricating same'2017 9,548,376'Method of manufacturing a semiconductor device including a barrier structure'2017 9,543,375'MIM/RRAM structure with improved capacitance and reduced leakage current'2017 9,543,362'Protective layer(s) in organic image sensors'2017 9,533,876'MEMS structures and methods for forming the same'2017 9,530,685'Isolation trench through backside of substrate'2016 9,527,188'Grinding wheel for wafer edge trimming'2016 9,525,130'Phase change memory and method of fabricating same'2016 9,508,586'Debonding schemes'2016 9,508,659'Method and apparatus to protect a wafer edge'2016 9,508,722'Semiconductor arrangment with capacitor'2016 9,502,514'Memory devices and method of forming same'2016 9,502,493'Multi-step method of forming a metal film'2016 9,502,396'Air trench in packages incorporating hybrid bonding'2016 9,490,158'Bond chuck, methods of bonding, and tool including bond chuck'2016 9,484,537'Organic photo diode with dual electron blocking layers'2016 9,484,351'Split gate memory device and method of fabricating the same'2016 9,478,632'Method of manufacturing a semiconductor device'2016 9,472,504'Semiconductor having a high aspect ratio via'2016 9,466,663'Semiconductor arrangement having capacitor separated from active region'2016 9,446,467'Integrate rinse module in hybrid bonding platform'2016 9,450,183'Memory structure having top electrode with protrusion'2016 9,450,057'Split gate cells for embedded flash memory'2016 9,443,796'Air trench in packages incorporating hybrid bonding'2016 9,431,609'Oxide film scheme for RRAM structure'2016 9,425,343'Mechanisms for forming image sensor device'2016 9,425,240'Image sensors with organic photodiodes and methods for forming the same'2016 9,425,061'Buffer cap layer to improve MIM structure performance'2016 9,418,901'Semiconductor device containing HEMT and MISFET and method of forming the same'2016 9,418,999'MIM capacitors with improved reliability'2016 9,419,218'Resistance variable memory structure and method of forming the same'2016 9,385,136'Silicon dot formation by self-assembly method and selective silicon growth for flash memory'2016 9,377,401'Biological sensing structures'2016 9,373,689'High electron mobility transistor and method of forming the same'2016 9,368,610'High electron mobility transistor with indium nitride layer'2016 9,362,271'Capacitive device'2016 9,355,882'Transfer module for bowed wafers'2016 9,356,231'MRAM device and fabrication method thereof'2016 9,349,768'CMOS image sensor with epitaxial passivation layer'2016 9,337,225'Semiconductor device and manufacturing method thereof'2016 9,331,032'Hybrid bonding and apparatus for performing the same'2016 9,306,158'MRAM device and fabrication method thereof'2016 9,299,927'Memory cell having resistance variable film and method of making the same'2016 9,293,445'Wafer level packaging bond'2016 9,293,392'3DIC interconnect apparatus and method'2016 9,287,279'Silicon nitride (SiN) encapsulating layer for silicon nanocrystal memory storage'2016 9,281,203'Silicon dot formation by direct self-assembly method for flash memory'2016 9,281,331'High dielectric constant structure for the vertical transfer gates of a complementary metal-oxide semiconductor (CMOS) image sensor'2016 9,263,569'MISFET device and method of forming the same'2016 9,257,568'Structure for flash memory cells'2016 9,257,498'Process to improve performance for metal-insulator-metal (MIM) capacitors'2016 9,257,642'Protective sidewall techniques for RRAM'2016 9,257,497'Metal-insulator-metal (MIM) capacitor techniques'2016 9,257,636'Perpendicular magnetic random-access memory (MRAM) formation by direct self-assembly method'2016 9,257,399'3D integrated circuit and methods of forming the same'2016 9,252,296'Semiconductor device with compressive layers'2016 9,245,991'Semiconductor device, high electron mobility transistor (HEMT) and method of manufacturing'2016 9,245,974'Performance boost by silicon epitaxy'2016 9,219,109'Inductor structure with magnetic material'2015 9,219,240'Protective layer(s) in organic image sensors'2015 9,214,539'Gallium nitride transistor with a hybrid aluminum oxide layer as a gate dielectric'2015 9,202,875'High electron mobility transistor with indium nitride layer'2015 9,196,825'Reversed stack MTJ'2015 9,190,441'Image sensor trench isolation with conformal doping'2015 9,178,136'Magnetoresistive random access memory cell and fabricating the same'2015 9,178,144'RRAM cell with bottom electrode'2015 9,169,117'MEMS device and method of forming the same'2015 9,172,033'MRAM device and fabrication method thereof'2015 9,166,153'System and process to remove film from semiconductor devices'2015 9,159,842'Embedded nonvolatile memory'2015 9,159,723'Method for manufacturing semiconductor device and semiconductor device'2015 9,153,435'Reducing wafer distortion through a high CTE layer'2015 9,153,717'Backside illuminated photo-sensitive device with gradated buffer layer'2015 9,142,407'Semiconductor structure having sets of III-V compound layers and method of forming the same'2015 9,142,761'Method for fabricating a magnetic tunnel junction device'2015 9,136,393'HK embodied flash memory and methods of forming the same'2015 9,130,026'Crystalline layer for passivation of III-N surface'2015 9,130,156'Process to remove film from semiconductor devices'2015 9,123,671'Silicon wafer strength enhancement'2015 9,105,759'Capacitive device and method of making the same'2015 9,099,324'Semiconductor device with trench isolation'2015 9,099,476'Semiconductor having a high aspect ratio via'2015 9,099,389'Method and apparatus for reducing stripe patterns'2015 9,093,511'Transistor having high breakdown voltage and method of making the same'2015 9,087,981'Methods of forming a magnetic tunnel junction device'2015 9,082,651'Memory devices and method of forming same'2015 9,076,854'Semiconductor device'2015 9,076,681'Memory devices and method of fabricating same'2015 9,064,821'Silicon dot formation by self-assembly method and selective silicon growth for flash memory'2015 9,059,057'Image sensor having compressive layers'2015 9,054,121'MEMS structures and methods for forming the same'2015 9,048,128'Inductor structure with magnetic material'2015 9,048,283'Hybrid bonding systems and methods for semiconductor wafers'2015 9,048,316'Flash memory structure and method of forming the same'2015 9,040,385'Mechanisms for cleaning substrate surface for hybrid bonding'2015 9,040,951'Resistance variable memory structure and method of forming the same'2015 9,006,080'Varied STI liners for isolation structures in image sensing devices'2015 8,999,777'Method of conducting a direction-specific trimming process for contact patterning'2015 8,999,833'Method and apparatus for controlling gate dimensions of memory devices'2015 8,987,033'Method for forming CMOS image sensors'2015 8,975,641'Transistor having an ohmic contact by gradient layer and method of making the same'2015 8,969,882'Transistor having an ohmic contact by screen layer and method of making the same'2015 8,969,171'Method of making deep trench, and devices formed by the method'2015 8,945,344'Systems and methods of separating bonded wafers'2015 8,932,897'Phase change memory cell'2015 8,932,900'Phase change memory and method of fabricating same'2015 8,928,120'Wafer edge protection structure'2015 8,921,959'MRAM device and fabrication method thereof'2014 8,912,573'Semiconductor device containing HEMT and MISFET and method of forming the same'2014 8,905,293'Self-removal anti-stiction coating for bonding process'2014 8,901,609'Transistor having doped substrate and method of making the same'2014 8,889,507'MIM capacitors with improved reliability'2014 8,883,524'Methods and apparatus for CMOS sensors'2014 8,884,268'Diffusion barrier layer for group III nitride on silicon substrate'2014 8,872,149'RRAM structure and process using composite spacer'2014 8,853,811'Image sensor trench isolation with conformal doping'2014 8,853,768'Method of fabricating MONOS semiconductor device'2014 8,851,133'Method and apparatus of holding a device'2014 8,846,129'Biological sensing structures and methods of forming the same'2014 8,836,055'MEMS structures and methods for forming the same'2014 8,822,237'Hole first hardmask definition'2014 8,816,358'Plasmonic nanostructures for organic image sensors'2014 8,809,123'Three dimensional integrated circuit structures and hybrid bonding methods for semiconductor wafers'2014 8,802,457'Backside surface treatment of semiconductor chips'2014 8,802,538'Methods for hybrid wafer bonding'2014 8,791,571'System and method for preventing etch arcing during semiconductor processing'2014 8,791,504'Substrate breakdown voltage improvement for group III-nitride on a silicon substrate'2014 8,790,946'Methods of bonding caps for MEMS devices'2014 8,772,831'III-nitride growth method on silicon substrate'2014 8,759,225'Method to form a CMOS image sensor'2014 8,735,207'Method to avoid fixed pattern noise within backside illuminated (BSI) complementary metal-oxide-semiconductor (CMOS) sensor array'2014 8,728,845'Method and apparatus for selectively removing anti-stiction coating'2014 8,723,185'Reducing wafer distortion through a high CTE layer'2014 8,710,560'Embedded bonding pad for image sensors'2014 8,685,783'Phase change memory cell'2014 8,647,962'Wafer level packaging bond'2014 8,629,531'Structure and method to reduce wafer warp for gallium nitride on silicon wafer'2014 8,628,990'Image device and methods of forming the same'2014 8,610,227'Formation of embedded micro-lens'2013 8,598,687'Semiconductor having a high aspect ratio via'2013 8,569,849'Hole first hardmask definition'2013 8,558,297'MRAM cell structure'2013 8,501,572'Spacer structure for transistor device and method of manufacturing same'2013 RE044376'Silicon substrate with reduced surface roughness'2013 8,476,146'Reducing wafer distortion through a low CTE layer'2013 8,445,953'Structure for flash memory cells'2013 8,445,380'Semiconductor having a high aspect ratio via'2013 8,377,733'Antireflective layer for backside illuminated image sensor and method of manufacturing same'2013 8,354,295'Backside illuminated sensor processing'2013 8,344,343'Composite film for phase change memory devices'2013 8,313,959'Hole first hardmask definition'2012 8,288,750'Phase change memory device with air gap'2012 8,278,122'Method for forming MTJ cells'2012 8,273,625'Structure for flash memory cells'2012

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1996–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (229)· patent assignee history

1996–2020Based in Hsinchu, TW· patent location history

1996–2014Based in Hsin Chu, TW· patent location history

2007Based in Awaiting, TW· patent location history

2011–2015Patents assigned to TSAI CHIA-SHIUNG (54)· patent assignee history

2012–2015Patents assigned to LIU SHIH-CHANG (16)· patent assignee history

2012–2015Patents assigned to CHAO LAN-LIN (13)· patent assignee history

2014Based in Kaohsiung, TW· patent location history

2015–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (201)· patent assignee history

2015Based in Hsinchuq, TW· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
TAIWAN SEMICONDUCTOR MFG	229	1996–2016
TAIWAN SEMICONDUCTOR MFG CO LTD	201	2015–2020
TSAI CHIA-SHIUNGself	54	2011–2015
LIU SHIH-CHANG	16	2012–2015
CHAO LAN-LIN	13	2012–2015

Locations

Location	Patents	Span
Hsinchu, TW	425	1996–2020
Hsin Chu, TW	4	1996–2014
Hsinchuq, TW	1	2015
Kaohsiung, TW	1	2014
Awaiting, TW	1	2007